X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fnetarm_eth.c;h=325f16c3a88ee4840602e80d2468ef42d9aa8778;hb=4ef8d53caadbab5585ccb4df2d087183b1383b86;hp=a99ee5da2e31a44efcf2bc2a58cebdc6c6997407;hpb=9caeaadf508cd0e11ac5dfc56ab0f72e3b89a105;p=u-boot

diff --git a/drivers/net/netarm_eth.c b/drivers/net/netarm_eth.c
index a99ee5da2e..325f16c3a8 100644
--- a/drivers/net/netarm_eth.c
+++ b/drivers/net/netarm_eth.c
@@ -22,16 +22,11 @@
 
 
 #include <common.h>
-
-#ifdef CONFIG_DRIVER_NETARMETH
 #include <command.h>
 #include <net.h>
 #include "netarm_eth.h"
 #include <asm/arch/netarm_registers.h>
 
-
-#if defined(CONFIG_CMD_NET)
-
 static int na_mii_poll_busy (void);
 
 static void na_get_mac_addr (void)
@@ -56,13 +51,12 @@ static void na_get_mac_addr (void)
 	setenv ("ethaddr", ethaddr);
 }
 
-
 static void na_mii_write (int reg, int value)
 {
 	int mii_addr;
 
 	/* Select register */
-	mii_addr = CFG_ETH_PHY_ADDR + reg;
+	mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
 	SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
 	/* Write value */
 	SET_EADDR (NETARM_ETH_MII_WRITE, value);
@@ -74,7 +68,7 @@ static unsigned int na_mii_read (int reg)
 	int mii_addr, val;
 
 	/* Select register */
-	mii_addr = CFG_ETH_PHY_ADDR + reg;
+	mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
 	SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
 	/* do one management cycle */
 	SET_EADDR (NETARM_ETH_MII_CMD,
@@ -87,9 +81,10 @@ static unsigned int na_mii_read (int reg)
 
 static int na_mii_poll_busy (void)
 {
+	ulong start;
 	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked ();
-	while (get_timer_masked () < NA_MII_POLL_BUSY_DELAY) {
+	start = get_timer(0));
+	while (get_timer(start) < NA_MII_POLL_BUSY_DELAY) {
 		if (!(GET_EADDR (NETARM_ETH_MII_IND) & NETARM_ETH_MIII_BUSY)) {
 			return 1;
 		}
@@ -170,19 +165,20 @@ static unsigned int na_mii_check_speed (void)
 static int reset_eth (void)
 {
 	int pt;
+	ulong start;
 
 	na_get_mac_addr ();
 	pt = na_mii_identify_phy ();
 
 	/* reset the phy */
 	na_mii_write (MII_PHY_CONTROL, 0x8000);
-	reset_timer_masked ();
-	while (get_timer_masked () < NA_MII_NEGOTIATE_DELAY) {
+	start = get_timer(0);
+	while (get_timer(start) < NA_MII_NEGOTIATE_DELAY) {
 		if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
 			break;
 		}
 	}
-	if (get_timer_masked () >= NA_MII_NEGOTIATE_DELAY)
+	if (get_timer(start) >= NA_MII_NEGOTIATE_DELAY)
 		printf ("phy reset timeout\n");
 
 	/* set the PCS reg */
@@ -304,7 +300,7 @@ extern int eth_rx (void)
 }
 
 /* Send a data block via Ethernet. */
-extern int eth_send (volatile void *packet, int length)
+extern int eth_send(void *packet, int length)
 {
 	int i, length32;
 	char *pa;
@@ -354,7 +350,3 @@ extern int eth_send (volatile void *packet, int length)
 	printf ("eth_send timeout\n");
 	return 1;
 }
-
-#endif /* COMMANDS & CFG_NET */
-
-#endif /* CONFIG_DRIVER_NETARMETH */