X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fnetarm_eth.c;h=f54817e58dd3c984c5bcbb6a8ec670944fc5aaab;hb=bace3d00f28040f061e0e21126bc70cfb9d20930;hp=c011809b6fd4b2e19ea085fb116a04bea5aa98a2;hpb=b77cddc7b52acd4ed78830ac681a398dd3053938;p=u-boot

diff --git a/drivers/net/netarm_eth.c b/drivers/net/netarm_eth.c
index c011809b6f..f54817e58d 100644
--- a/drivers/net/netarm_eth.c
+++ b/drivers/net/netarm_eth.c
@@ -56,7 +56,7 @@ static void na_mii_write (int reg, int value)
 	int mii_addr;
 
 	/* Select register */
-	mii_addr = CFG_ETH_PHY_ADDR + reg;
+	mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
 	SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
 	/* Write value */
 	SET_EADDR (NETARM_ETH_MII_WRITE, value);
@@ -68,7 +68,7 @@ static unsigned int na_mii_read (int reg)
 	int mii_addr, val;
 
 	/* Select register */
-	mii_addr = CFG_ETH_PHY_ADDR + reg;
+	mii_addr = CONFIG_SYS_ETH_PHY_ADDR + reg;
 	SET_EADDR (NETARM_ETH_MII_ADDR, mii_addr);
 	/* do one management cycle */
 	SET_EADDR (NETARM_ETH_MII_CMD,
@@ -81,9 +81,10 @@ static unsigned int na_mii_read (int reg)
 
 static int na_mii_poll_busy (void)
 {
+	ulong start;
 	/* arm simple, non interrupt dependent timer */
-	reset_timer_masked ();
-	while (get_timer_masked () < NA_MII_POLL_BUSY_DELAY) {
+	start = get_timer(0));
+	while (get_timer(start) < NA_MII_POLL_BUSY_DELAY) {
 		if (!(GET_EADDR (NETARM_ETH_MII_IND) & NETARM_ETH_MIII_BUSY)) {
 			return 1;
 		}
@@ -164,19 +165,20 @@ static unsigned int na_mii_check_speed (void)
 static int reset_eth (void)
 {
 	int pt;
+	ulong start;
 
 	na_get_mac_addr ();
 	pt = na_mii_identify_phy ();
 
 	/* reset the phy */
 	na_mii_write (MII_PHY_CONTROL, 0x8000);
-	reset_timer_masked ();
-	while (get_timer_masked () < NA_MII_NEGOTIATE_DELAY) {
+	start = get_timer(0);
+	while (get_timer(start) < NA_MII_NEGOTIATE_DELAY) {
 		if ((na_mii_read (MII_PHY_STATUS) & 0x8000) == 0) {
 			break;
 		}
 	}
-	if (get_timer_masked () >= NA_MII_NEGOTIATE_DELAY)
+	if (get_timer(start) >= NA_MII_NEGOTIATE_DELAY)
 		printf ("phy reset timeout\n");
 
 	/* set the PCS reg */