X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fns8382x.c;h=198f73dee695074486704523f365d5f4906212f7;hb=256670680b058105bb948c9f55e11db7ed949fa9;hp=a2d61afec7a66b535b080b078494b78397c49605;hpb=16116ddd0d0158f4e91c91dc979b845b6e98a99d;p=u-boot

diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index a2d61afec7..198f73dee6 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -445,7 +445,7 @@ ns8382x_initialize(bd_t * bis)
 	Read and write MII registers using software-generated serial MDIO
 	protocol.  See the MII specifications or DP83840A data sheet for details.
 
-	The maximum data clock rate is 2.5 Mhz.  To meet minimum timing we
+	The maximum data clock rate is 2.5 MHz.  To meet minimum timing we
 	must flush writes to the PCI bus with a PCI read. */
 #define mdio_delay(mdio_addr) INL(dev, mdio_addr)