X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fsun8i_emac.c;h=3ccc6b0bb612de20e6973979c28bb7d981cbc2df;hb=30cbb524bca7c92ab7661de96839c54d794cb3cd;hp=09bbb2cdb5cad47967ffb5ca4f9f9f871349fc54;hpb=da409ccc4ae62a0bf7111e2f4419fdbfd1ba3d89;p=u-boot

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 09bbb2cdb5..3ccc6b0bb6 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -604,6 +604,8 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
 {
 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
 
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+	/* Only H3/H5 have clock controls for internal EPHY */
 	if (priv->use_internal_phy) {
 		/* Set clock gating for ephy */
 		setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@@ -611,6 +613,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
 		/* Deassert EPHY */
 		setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
 	}
+#endif
 
 	/* Set clock gating for emac */
 	setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));