X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Ftsec.c;h=f2ce4e2a8edb743c0616ea23e4655f983069826d;hb=17873341af56847382495f3d9f5a4121aeb9a03b;hp=943c4b3711bb7d99303431977ac8410ccbb2bac7;hpb=362b123f473cbc72d43720f9245c68d174439310;p=u-boot diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 943c4b3711..f2ce4e2a8e 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -10,29 +10,19 @@ #include #include +#include #include #include #include #include #include -#include +#include #include #include DECLARE_GLOBAL_DATA_PTR; -#define TX_BUF_CNT 2 - -#ifdef __GNUC__ -static struct txbd8 __iomem txbd[TX_BUF_CNT] __aligned(8); -static struct rxbd8 __iomem rxbd[PKTBUFSRX] __aligned(8); - -#else -#error "rtx must be 64-bit aligned" -#endif - -static int tsec_send(struct eth_device *dev, void *packet, int length); - +#ifndef CONFIG_DM_ETH /* Default initializations for TSEC controllers. */ static struct tsec_info_struct tsec_info[] = { @@ -58,6 +48,7 @@ static struct tsec_info_struct tsec_info[] = { STD_TSEC_INFO(4), /* TSEC4 */ #endif }; +#endif /* CONFIG_DM_ETH */ #define TBIANA_SETTINGS ( \ TBIANA_ASYMMETRIC_PAUSE \ @@ -110,7 +101,11 @@ static void tsec_configure_serdes(struct tsec_private *priv) * for PowerPC (tm) is usually the case) in the register holds * the entry. */ +#ifndef CONFIG_DM_ETH static int tsec_mcast_addr(struct eth_device *dev, const u8 *mcast_mac, u8 set) +#else +static int tsec_mcast_addr(struct udevice *dev, const u8 *mcast_mac, int set) +#endif { struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec __iomem *regs = priv->regs; @@ -231,15 +226,174 @@ static void adjust_link(struct tsec_private *priv, struct phy_device *phydev) (phydev->port == PORT_FIBRE) ? ", fiber mode" : ""); } +/* + * This returns the status bits of the device. The return value + * is never checked, and this is what the 8260 driver did, so we + * do the same. Presumably, this would be zero if there were no + * errors + */ +#ifndef CONFIG_DM_ETH +static int tsec_send(struct eth_device *dev, void *packet, int length) +#else +static int tsec_send(struct udevice *dev, void *packet, int length) +#endif +{ + struct tsec_private *priv = (struct tsec_private *)dev->priv; + struct tsec __iomem *regs = priv->regs; + uint16_t status; + int result = 0; + int i; + + /* Find an empty buffer descriptor */ + for (i = 0; + in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY; + i++) { + if (i >= TOUT_LOOP) { + debug("%s: tsec: tx buffers full\n", dev->name); + return result; + } + } + + out_be32(&priv->txbd[priv->tx_idx].bufptr, (u32)packet); + out_be16(&priv->txbd[priv->tx_idx].length, length); + status = in_be16(&priv->txbd[priv->tx_idx].status); + out_be16(&priv->txbd[priv->tx_idx].status, status | + (TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT)); + + /* Tell the DMA to go */ + out_be32(®s->tstat, TSTAT_CLEAR_THALT); + + /* Wait for buffer to be transmitted */ + for (i = 0; + in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_READY; + i++) { + if (i >= TOUT_LOOP) { + debug("%s: tsec: tx error\n", dev->name); + return result; + } + } + + priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT; + result = in_be16(&priv->txbd[priv->tx_idx].status) & TXBD_STATS; + + return result; +} + +#ifndef CONFIG_DM_ETH +static int tsec_recv(struct eth_device *dev) +{ + struct tsec_private *priv = (struct tsec_private *)dev->priv; + struct tsec __iomem *regs = priv->regs; + + while (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) { + int length = in_be16(&priv->rxbd[priv->rx_idx].length); + uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status); + uchar *packet = net_rx_packets[priv->rx_idx]; + + /* Send the packet up if there were no errors */ + if (!(status & RXBD_STATS)) + net_process_received_packet(packet, length - 4); + else + printf("Got error %x\n", (status & RXBD_STATS)); + + out_be16(&priv->rxbd[priv->rx_idx].length, 0); + + status = RXBD_EMPTY; + /* Set the wrap bit if this is the last element in the list */ + if ((priv->rx_idx + 1) == PKTBUFSRX) + status |= RXBD_WRAP; + out_be16(&priv->rxbd[priv->rx_idx].status, status); + + priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; + } + + if (in_be32(®s->ievent) & IEVENT_BSY) { + out_be32(®s->ievent, IEVENT_BSY); + out_be32(®s->rstat, RSTAT_CLEAR_RHALT); + } + + return -1; +} +#else +static int tsec_recv(struct udevice *dev, int flags, uchar **packetp) +{ + struct tsec_private *priv = (struct tsec_private *)dev->priv; + struct tsec __iomem *regs = priv->regs; + int ret = -1; + + if (!(in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY)) { + int length = in_be16(&priv->rxbd[priv->rx_idx].length); + uint16_t status = in_be16(&priv->rxbd[priv->rx_idx].status); + uint32_t buf; + + /* Send the packet up if there were no errors */ + if (!(status & RXBD_STATS)) { + buf = in_be32(&priv->rxbd[priv->rx_idx].bufptr); + *packetp = (uchar *)buf; + ret = length - 4; + } else { + printf("Got error %x\n", (status & RXBD_STATS)); + } + } + + if (in_be32(®s->ievent) & IEVENT_BSY) { + out_be32(®s->ievent, IEVENT_BSY); + out_be32(®s->rstat, RSTAT_CLEAR_RHALT); + } + + return ret; +} + +static int tsec_free_pkt(struct udevice *dev, uchar *packet, int length) +{ + struct tsec_private *priv = (struct tsec_private *)dev->priv; + uint16_t status; + + out_be16(&priv->rxbd[priv->rx_idx].length, 0); + + status = RXBD_EMPTY; + /* Set the wrap bit if this is the last element in the list */ + if ((priv->rx_idx + 1) == PKTBUFSRX) + status |= RXBD_WRAP; + out_be16(&priv->rxbd[priv->rx_idx].status, status); + + priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; + + return 0; +} +#endif + +/* Stop the interface */ +#ifndef CONFIG_DM_ETH +static void tsec_halt(struct eth_device *dev) +#else +static void tsec_halt(struct udevice *dev) +#endif +{ + struct tsec_private *priv = (struct tsec_private *)dev->priv; + struct tsec __iomem *regs = priv->regs; + + clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); + setbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); + + while ((in_be32(®s->ievent) & (IEVENT_GRSC | IEVENT_GTSC)) + != (IEVENT_GRSC | IEVENT_GTSC)) + ; + + clrbits_be32(®s->maccfg1, MACCFG1_TX_EN | MACCFG1_RX_EN); + + /* Shut down the PHY, as needed */ + phy_shutdown(priv->phydev); +} + #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 /* * When MACCFG1[Rx_EN] is enabled during system boot as part * of the eTSEC port initialization sequence, * the eTSEC Rx logic may not be properly initialized. */ -void redundant_init(struct eth_device *dev) +void redundant_init(struct tsec_private *priv) { - struct tsec_private *priv = dev->priv; struct tsec __iomem *regs = priv->regs; uint t, count = 0; int fail = 1; @@ -274,13 +428,14 @@ void redundant_init(struct eth_device *dev) do { uint16_t status; - tsec_send(dev, (void *)pkt, sizeof(pkt)); + tsec_send(priv->dev, (void *)pkt, sizeof(pkt)); /* Wait for buffer to be received */ - for (t = 0; in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY; + for (t = 0; + in_be16(&priv->rxbd[priv->rx_idx].status) & RXBD_EMPTY; t++) { if (t >= 10 * TOUT_LOOP) { - printf("%s: tsec: rx error\n", dev->name); + printf("%s: tsec: rx error\n", priv->dev->name); break; } } @@ -288,11 +443,11 @@ void redundant_init(struct eth_device *dev) if (!memcmp(pkt, net_rx_packets[priv->rx_idx], sizeof(pkt))) fail = 0; - out_be16(&rxbd[priv->rx_idx].length, 0); + out_be16(&priv->rxbd[priv->rx_idx].length, 0); status = RXBD_EMPTY; if ((priv->rx_idx + 1) == PKTBUFSRX) status |= RXBD_WRAP; - out_be16(&rxbd[priv->rx_idx].status, status); + out_be16(&priv->rxbd[priv->rx_idx].status, status); priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; if (in_be32(®s->ievent) & IEVENT_BSY) { @@ -320,9 +475,8 @@ void redundant_init(struct eth_device *dev) * Set up the buffers and their descriptors, and bring up the * interface */ -static void startup_tsec(struct eth_device *dev) +static void startup_tsec(struct tsec_private *priv) { - struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec __iomem *regs = priv->regs; uint16_t status; int i; @@ -335,31 +489,31 @@ static void startup_tsec(struct eth_device *dev) #endif /* Point to the buffer descriptors */ - out_be32(®s->tbase, (u32)&txbd[0]); - out_be32(®s->rbase, (u32)&rxbd[0]); + out_be32(®s->tbase, (u32)&priv->txbd[0]); + out_be32(®s->rbase, (u32)&priv->rxbd[0]); /* Initialize the Rx Buffer descriptors */ for (i = 0; i < PKTBUFSRX; i++) { - out_be16(&rxbd[i].status, RXBD_EMPTY); - out_be16(&rxbd[i].length, 0); - out_be32(&rxbd[i].bufptr, (u32)net_rx_packets[i]); + out_be16(&priv->rxbd[i].status, RXBD_EMPTY); + out_be16(&priv->rxbd[i].length, 0); + out_be32(&priv->rxbd[i].bufptr, (u32)net_rx_packets[i]); } - status = in_be16(&rxbd[PKTBUFSRX - 1].status); - out_be16(&rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP); + status = in_be16(&priv->rxbd[PKTBUFSRX - 1].status); + out_be16(&priv->rxbd[PKTBUFSRX - 1].status, status | RXBD_WRAP); /* Initialize the TX Buffer Descriptors */ for (i = 0; i < TX_BUF_CNT; i++) { - out_be16(&txbd[i].status, 0); - out_be16(&txbd[i].length, 0); - out_be32(&txbd[i].bufptr, 0); + out_be16(&priv->txbd[i].status, 0); + out_be16(&priv->txbd[i].length, 0); + out_be32(&priv->txbd[i].bufptr, 0); } - status = in_be16(&txbd[TX_BUF_CNT - 1].status); - out_be16(&txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP); + status = in_be16(&priv->txbd[TX_BUF_CNT - 1].status); + out_be16(&priv->txbd[TX_BUF_CNT - 1].status, status | TXBD_WRAP); #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 svr = get_svr(); if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) - redundant_init(dev); + redundant_init(priv); #endif /* Enable Transmit and Receive */ setbits_be32(®s->maccfg1, MACCFG1_RX_EN | MACCFG1_TX_EN); @@ -371,114 +525,22 @@ static void startup_tsec(struct eth_device *dev) clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); } -/* - * This returns the status bits of the device. The return value - * is never checked, and this is what the 8260 driver did, so we - * do the same. Presumably, this would be zero if there were no - * errors - */ -static int tsec_send(struct eth_device *dev, void *packet, int length) -{ - struct tsec_private *priv = (struct tsec_private *)dev->priv; - struct tsec __iomem *regs = priv->regs; - uint16_t status; - int result = 0; - int i; - - /* Find an empty buffer descriptor */ - for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) { - if (i >= TOUT_LOOP) { - debug("%s: tsec: tx buffers full\n", dev->name); - return result; - } - } - - out_be32(&txbd[priv->tx_idx].bufptr, (u32)packet); - out_be16(&txbd[priv->tx_idx].length, length); - status = in_be16(&txbd[priv->tx_idx].status); - out_be16(&txbd[priv->tx_idx].status, status | - (TXBD_READY | TXBD_LAST | TXBD_CRC | TXBD_INTERRUPT)); - - /* Tell the DMA to go */ - out_be32(®s->tstat, TSTAT_CLEAR_THALT); - - /* Wait for buffer to be transmitted */ - for (i = 0; in_be16(&txbd[priv->tx_idx].status) & TXBD_READY; i++) { - if (i >= TOUT_LOOP) { - debug("%s: tsec: tx error\n", dev->name); - return result; - } - } - - priv->tx_idx = (priv->tx_idx + 1) % TX_BUF_CNT; - result = in_be16(&txbd[priv->tx_idx].status) & TXBD_STATS; - - return result; -} - -static int tsec_recv(struct eth_device *dev) -{ - struct tsec_private *priv = (struct tsec_private *)dev->priv; - struct tsec __iomem *regs = priv->regs; - - while (!(in_be16(&rxbd[priv->rx_idx].status) & RXBD_EMPTY)) { - int length = in_be16(&rxbd[priv->rx_idx].length); - uint16_t status = in_be16(&rxbd[priv->rx_idx].status); - uchar *packet = net_rx_packets[priv->rx_idx]; - - /* Send the packet up if there were no errors */ - if (!(status & RXBD_STATS)) - net_process_received_packet(packet, length - 4); - else - printf("Got error %x\n", (status & RXBD_STATS)); - - out_be16(&rxbd[priv->rx_idx].length, 0); - - status = RXBD_EMPTY; - /* Set the wrap bit if this is the last element in the list */ - if ((priv->rx_idx + 1) == PKTBUFSRX) - status |= RXBD_WRAP; - out_be16(&rxbd[priv->rx_idx].status, status); - - priv->rx_idx = (priv->rx_idx + 1) % PKTBUFSRX; - } - - if (in_be32(®s->ievent) & IEVENT_BSY) { - out_be32(®s->ievent, IEVENT_BSY); - out_be32(®s->rstat, RSTAT_CLEAR_RHALT); - } - - return -1; -} - -/* Stop the interface */ -static void tsec_halt(struct eth_device *dev) -{ - struct tsec_private *priv = (struct tsec_private *)dev->priv; - struct tsec __iomem *regs = priv->regs; - - clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); - setbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); - - while ((in_be32(®s->ievent) & (IEVENT_GRSC | IEVENT_GTSC)) - != (IEVENT_GRSC | IEVENT_GTSC)) - ; - - clrbits_be32(®s->maccfg1, MACCFG1_TX_EN | MACCFG1_RX_EN); - - /* Shut down the PHY, as needed */ - phy_shutdown(priv->phydev); -} - /* * Initializes data structures and registers for the controller, * and brings the interface up. Returns the link status, meaning * that it returns success if the link is up, failure otherwise. * This allows U-Boot to find the first active controller. */ +#ifndef CONFIG_DM_ETH static int tsec_init(struct eth_device *dev, bd_t * bd) +#else +static int tsec_init(struct udevice *dev) +#endif { struct tsec_private *priv = (struct tsec_private *)dev->priv; +#ifdef CONFIG_DM_ETH + struct eth_pdata *pdata = dev_get_platdata(dev); +#endif struct tsec __iomem *regs = priv->regs; u32 tempval; int ret; @@ -498,12 +560,21 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) * order (BE), MACnADDR1 is set to 0xCDAB7856 and * MACnADDR2 is set to 0x34120000. */ +#ifndef CONFIG_DM_ETH tempval = (dev->enetaddr[5] << 24) | (dev->enetaddr[4] << 16) | (dev->enetaddr[3] << 8) | dev->enetaddr[2]; +#else + tempval = (pdata->enetaddr[5] << 24) | (pdata->enetaddr[4] << 16) | + (pdata->enetaddr[3] << 8) | pdata->enetaddr[2]; +#endif out_be32(®s->macstnaddr1, tempval); +#ifndef CONFIG_DM_ETH tempval = (dev->enetaddr[1] << 24) | (dev->enetaddr[0] << 16); +#else + tempval = (pdata->enetaddr[1] << 24) | (pdata->enetaddr[0] << 16); +#endif out_be32(®s->macstnaddr2, tempval); @@ -511,7 +582,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) init_registers(regs); /* Ready the device for tx/rx */ - startup_tsec(dev); + startup_tsec(priv); /* Start up the PHY */ ret = phy_startup(priv->phydev); @@ -574,9 +645,8 @@ static phy_interface_t tsec_get_interface(struct tsec_private *priv) * properly. If the PHY is not recognized, then return 0 * (failure). Otherwise, return 1 */ -static int init_phy(struct eth_device *dev) +static int init_phy(struct tsec_private *priv) { - struct tsec_private *priv = (struct tsec_private *)dev->priv; struct phy_device *phydev; struct tsec __iomem *regs = priv->regs; u32 supported = (SUPPORTED_10baseT_Half | @@ -588,14 +658,15 @@ static int init_phy(struct eth_device *dev) supported |= SUPPORTED_1000baseT_Full; /* Assign a Physical address to the TBI */ - out_be32(®s->tbipa, CONFIG_SYS_TBIPA_VALUE); + out_be32(®s->tbipa, priv->tbiaddr); priv->interface = tsec_get_interface(priv); if (priv->interface == PHY_INTERFACE_MODE_SGMII) tsec_configure_serdes(priv); - phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); + phydev = phy_connect(priv->bus, priv->phyaddr, priv->dev, + priv->interface); if (!phydev) return 0; @@ -609,6 +680,7 @@ static int init_phy(struct eth_device *dev) return 1; } +#ifndef CONFIG_DM_ETH /* * Initialize device structure. Returns success if PHY * initialization succeeded (i.e. if it recognizes the PHY) @@ -635,11 +707,13 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info) priv->phyregs_sgmii = tsec_info->miiregs_sgmii; priv->phyaddr = tsec_info->phyaddr; + priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE; priv->flags = tsec_info->flags; - sprintf(dev->name, tsec_info->devname); + strcpy(dev->name, tsec_info->devname); priv->interface = tsec_info->interface; priv->bus = miiphy_get_dev_by_name(tsec_info->mii_devname); + priv->dev = dev; dev->iobase = 0; dev->priv = priv; dev->init = tsec_init; @@ -662,7 +736,7 @@ static int tsec_initialize(bd_t *bis, struct tsec_info_struct *tsec_info) clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); /* Try to initialize PHY here, and return */ - return init_phy(dev); + return init_phy(priv); } /* @@ -695,3 +769,118 @@ int tsec_standard_init(bd_t *bis) return tsec_eth_init(bis, tsec_info, ARRAY_SIZE(tsec_info)); } +#else /* CONFIG_DM_ETH */ +int tsec_probe(struct udevice *dev) +{ + struct tsec_private *priv = dev_get_priv(dev); + struct eth_pdata *pdata = dev_get_platdata(dev); + struct fsl_pq_mdio_info mdio_info; + int offset = 0; + int reg; + const char *phy_mode; + int ret; + + pdata->iobase = (phys_addr_t)dev_get_addr(dev); + priv->regs = (struct tsec *)pdata->iobase; + + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), + "phy-handle"); + if (offset > 0) { + reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); + priv->phyaddr = reg; + } else { + debug("phy-handle does not exist under tsec %s\n", dev->name); + return -ENOENT; + } + + offset = fdt_parent_offset(gd->fdt_blob, offset); + if (offset > 0) { + reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0); + priv->phyregs_sgmii = (struct tsec_mii_mng *)(reg + 0x520); + } else { + debug("No parent node for PHY?\n"); + return -ENOENT; + } + + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev), + "tbi-handle"); + if (offset > 0) { + reg = fdtdec_get_int(gd->fdt_blob, offset, "reg", + CONFIG_SYS_TBIPA_VALUE); + priv->tbiaddr = reg; + } else { + priv->tbiaddr = CONFIG_SYS_TBIPA_VALUE; + } + + phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), + "phy-connection-type", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + debug("Invalid PHY interface '%s'\n", phy_mode); + return -EINVAL; + } + priv->interface = pdata->phy_interface; + + /* Initialize flags */ + priv->flags = TSEC_GIGABIT; + if (priv->interface == PHY_INTERFACE_MODE_SGMII) + priv->flags |= TSEC_SGMII; + + mdio_info.regs = priv->phyregs_sgmii; + mdio_info.name = (char *)dev->name; + ret = fsl_pq_mdio_init(NULL, &mdio_info); + if (ret) + return ret; + + /* Reset the MAC */ + setbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); + udelay(2); /* Soft Reset must be asserted for 3 TX clocks */ + clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); + + priv->dev = dev; + priv->bus = miiphy_get_dev_by_name(dev->name); + + /* Try to initialize PHY here, and return */ + return !init_phy(priv); +} + +int tsec_remove(struct udevice *dev) +{ + struct tsec_private *priv = dev->priv; + + free(priv->phydev); + mdio_unregister(priv->bus); + mdio_free(priv->bus); + + return 0; +} + +static const struct eth_ops tsec_ops = { + .start = tsec_init, + .send = tsec_send, + .recv = tsec_recv, + .free_pkt = tsec_free_pkt, + .stop = tsec_halt, +#ifdef CONFIG_MCAST_TFTP + .mcast = tsec_mcast_addr, +#endif +}; + +static const struct udevice_id tsec_ids[] = { + { .compatible = "fsl,tsec" }, + { } +}; + +U_BOOT_DRIVER(eth_tsec) = { + .name = "tsec", + .id = UCLASS_ETH, + .of_match = tsec_ids, + .probe = tsec_probe, + .remove = tsec_remove, + .ops = &tsec_ops, + .priv_auto_alloc_size = sizeof(struct tsec_private), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +}; +#endif /* CONFIG_DM_ETH */