X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fnet%2Fvsc7385.c;h=072421062b637eee13ce60a8e4cebff5dfc1e97c;hb=51b2411946e5f247f26fde41a7227a002270d376;hp=4e7259fd96930bde6cdf38ff22ecb7ccfe0380dd;hpb=cdeb62e20d94005f2e80604fda03b498c3a6f704;p=u-boot

diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c
index 4e7259fd96..072421062b 100644
--- a/drivers/net/vsc7385.c
+++ b/drivers/net/vsc7385.c
@@ -14,8 +14,10 @@
 
 #include <config.h>
 #include <common.h>
+#include <console.h>
 #include <asm/io.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
+#include "vsc7385.h"
 
 /*
  * Upload a Vitesse VSC7385 firmware image to the hardware
@@ -35,13 +37,13 @@ int vsc7385_upload_firmware(void *firmware, unsigned int size)
 	u8 *fw = firmware;
 	unsigned int i;
 
-	u32 *gloreset = (u32 *) (CFG_VSC7385_BASE + 0x1c050);
-	u32 *icpu_ctrl = (u32 *) (CFG_VSC7385_BASE + 0x1c040);
-	u32 *icpu_addr = (u32 *) (CFG_VSC7385_BASE + 0x1c044);
-	u32 *icpu_data = (u32 *) (CFG_VSC7385_BASE + 0x1c048);
-	u32 *icpu_rom_map = (u32 *) (CFG_VSC7385_BASE + 0x1c070);
+	u32 *gloreset = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c050);
+	u32 *icpu_ctrl = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c040);
+	u32 *icpu_addr = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c044);
+	u32 *icpu_data = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c048);
+	u32 *icpu_rom_map = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c070);
 #ifdef DEBUG
-	u32 *chipid = (u32 *) (CFG_VSC7385_BASE + 0x1c060);
+	u32 *chipid = (u32 *) (CONFIG_SYS_VSC7385_BASE + 0x1c060);
 #endif
 
 	out_be32(gloreset, 3);