X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci-uclass.c;h=a1408f5bf1ca7c157f4210759ae0a73617020ead;hb=f532703665ae5e5957211bbc4e7296a8313cc403;hp=685df9d274e4ba1c960523fad72fc2482335fdaa;hpb=4edde96111aefac63d6aaca6ba87a90d149e973e;p=u-boot diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 685df9d274..a1408f5bf1 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP) #include @@ -22,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; -static int pci_get_bus(int busnum, struct udevice **busp) +int pci_get_bus(int busnum, struct udevice **busp) { int ret; @@ -30,31 +29,15 @@ static int pci_get_bus(int busnum, struct udevice **busp) /* Since buses may not be numbered yet try a little harder with bus 0 */ if (ret == -ENODEV) { - ret = uclass_first_device(UCLASS_PCI, busp); + ret = uclass_first_device_err(UCLASS_PCI, busp); if (ret) return ret; - else if (!*busp) - return -ENODEV; ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp); } return ret; } -struct pci_controller *pci_bus_to_hose(int busnum) -{ - struct udevice *bus; - int ret; - - ret = pci_get_bus(busnum, &bus); - if (ret) { - debug("%s: Cannot get bus %d: ret=%d\n", __func__, busnum, ret); - return NULL; - } - - return dev_get_uclass_priv(bus); -} - struct udevice *pci_get_controller(struct udevice *dev) { while (device_is_on_pci_bus(dev)) @@ -266,6 +249,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset, return ops->write_config(bus, bdf, offset, value, size); } +int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset, + u32 clr, u32 set) +{ + ulong val; + int ret; + + ret = pci_bus_read_config(bus, bdf, offset, &val, PCI_SIZE_32); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return pci_bus_write_config(bus, bdf, offset, val, PCI_SIZE_32); +} + int pci_write_config(pci_dev_t bdf, int offset, unsigned long value, enum pci_size_t size) { @@ -290,7 +288,6 @@ int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value, size); } - int pci_write_config32(pci_dev_t bdf, int offset, u32 value) { return pci_write_config(bdf, offset, value, PCI_SIZE_32); @@ -434,6 +431,48 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep) return 0; } +int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u8 val; + int ret; + + ret = dm_pci_read_config8(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config8(dev, offset, val); +} + +int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u16 val; + int ret; + + ret = dm_pci_read_config16(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config16(dev, offset, val); +} + +int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u32 val; + int ret; + + ret = dm_pci_read_config32(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config32(dev, offset, val); +} + static void set_vga_bridge_bits(struct udevice *dev) { struct udevice *parent = dev->parent; @@ -642,7 +681,7 @@ int pci_bind_bus_devices(struct udevice *bus) found_multi = false; end = PCI_BDF(bus->seq, PCI_MAX_PCI_DEVICES - 1, PCI_MAX_PCI_FUNCTIONS - 1); - for (bdf = PCI_BDF(bus->seq, 0, 0); bdf < end; + for (bdf = PCI_BDF(bus->seq, 0, 0); bdf <= end; bdf += PCI_BDF(0, 0, 1)) { struct pci_child_platdata *pplat; struct udevice *dev; @@ -713,27 +752,6 @@ error: return ret; } -static int pci_uclass_post_bind(struct udevice *bus) -{ - /* - * If there is no pci device listed in the device tree, - * don't bother scanning the device tree. - */ - if (bus->of_offset == -1) - return 0; - - /* - * Scan the device tree for devices. This does not probe the PCI bus, - * as this is not permitted while binding. It just finds devices - * mentioned in the device tree. - * - * Before relocation, only bind devices marked for pre-relocation - * use. - */ - return dm_scan_fdt_node(bus, gd->fdt_blob, bus->of_offset, - gd->flags & GD_FLG_RELOC ? false : true); -} - static int decode_regions(struct pci_controller *hose, const void *blob, int parent_node, int node) { @@ -819,10 +837,11 @@ static int pci_uclass_pre_probe(struct udevice *bus) hose = bus->uclass_priv; /* For bridges, use the top-level PCI controller */ - if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) { + if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; - ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset, - bus->of_offset); + ret = decode_regions(hose, gd->fdt_blob, + dev_of_offset(bus->parent), + dev_of_offset(bus)); if (ret) { debug("%s: Cannot decode regions\n", __func__); return ret; @@ -885,7 +904,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev) struct fdt_pci_addr addr; int ret; - if (dev->of_offset == -1) + if (dev_of_offset(dev) == -1) return 0; /* @@ -893,7 +912,7 @@ static int pci_uclass_child_post_bind(struct udevice *dev) * just check the address. */ pplat = dev_get_parent_platdata(dev); - ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset, + ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), FDT_PCI_SPACE_CONFIG, "reg", &addr); if (ret) { @@ -1067,6 +1086,14 @@ u32 dm_pci_read_bar32(struct udevice *dev, int barnum) return addr & PCI_BASE_ADDRESS_MEM_MASK; } +void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr) +{ + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + dm_pci_write_config32(dev, bar, addr); +} + static int _dm_pci_bus_to_phys(struct udevice *ctlr, pci_addr_t bus_addr, unsigned long flags, unsigned long skip_mask, phys_addr_t *pa) @@ -1206,7 +1233,7 @@ UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", .flags = DM_UC_FLAG_SEQ_ALIAS, - .post_bind = pci_uclass_post_bind, + .post_bind = dm_scan_fdt_dev, .pre_probe = pci_uclass_pre_probe, .post_probe = pci_uclass_post_probe, .child_post_bind = pci_uclass_child_post_bind, @@ -1247,3 +1274,18 @@ U_BOOT_DRIVER(pci_generic_drv) = { .id = UCLASS_PCI_GENERIC, .of_match = pci_generic_ids, }; + +void pci_init(void) +{ + struct udevice *bus; + + /* + * Enumerate all known controller devices. Enumeration has the side- + * effect of probing them, so PCIe devices will be enumerated too. + */ + for (uclass_first_device(UCLASS_PCI, &bus); + bus; + uclass_next_device(&bus)) { + ; + } +}