X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci.c;h=cd64a87fc6d9b200ed805ae1e6f5a7e014180435;hb=944a4894c047f9fc17d21f1e4ca92d5909b8405b;hp=06b56b05f7e11da5536581f443f51d841917b428;hpb=2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf;p=u-boot

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 06b56b05f7..cd64a87fc6 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -116,6 +116,25 @@ PCI_READ_VIA_DWORD_OP(word, u16 *, 0x02)
 PCI_WRITE_VIA_DWORD_OP(byte, u8, 0x03, 0x000000ff)
 PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff)
 
+/* Get a virtual address associated with a BAR region */
+void *pci_map_bar(pci_dev_t pdev, int bar, int flags)
+{
+	pci_addr_t pci_bus_addr;
+	u32 bar_response;
+
+	/* read BAR address */
+	pci_read_config_dword(pdev, bar, &bar_response);
+	pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+
+	/*
+	 * Pass "0" as the length argument to pci_bus_to_virt.  The arg
+	 * isn't actualy used on any platform because u-boot assumes a static
+	 * linear mapping.  In the future, this could read the BAR size
+	 * and pass that as the size if needed.
+	 */
+	return pci_bus_to_virt(pdev, pci_bus_addr, flags, 0, MAP_NOCACHE);
+}
+
 /*
  *
  */
@@ -146,6 +165,19 @@ struct pci_controller *pci_bus_to_hose (int bus)
 	return NULL;
 }
 
+int pci_last_busno(void)
+{
+	struct pci_controller *hose = hose_head;
+
+	if (!hose)
+		return -1;
+
+	while (hose->next)
+		hose = hose->next;
+
+	return hose->last_busno;
+}
+
 #ifndef CONFIG_IXP425
 pci_dev_t pci_find_devices(struct pci_device_id *ids, int index)
 {
@@ -356,7 +388,7 @@ int pci_hose_config_device(struct pci_controller *hose,
 
 	pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0);
 
-	for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_5; bar += 4) {
+	for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) {
 		pci_hose_write_config_dword (hose, dev, bar, 0xffffffff);
 		pci_hose_read_config_dword (hose, dev, bar, &bar_response);