X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci_indirect.c;h=2070d0134b77f1527b0cf33948f9f1c18672b255;hb=c5d02825aeb39a74e4faf789bf94a8610c9a1d0f;hp=a8220fb4117c2ac8de84da417814c051caad3254;hpb=4985ca5af3767ffe13ea96e1dc26f88c81084414;p=u-boot diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index a8220fb411..2070d0134b 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -11,7 +11,6 @@ #include -#ifdef CONFIG_PCI #if (!defined(__I386__) && !defined(CONFIG_IXDP425)) #include @@ -33,17 +32,17 @@ extern void out_le32 (volatile unsigned *addr, unsigned int val); #if defined(CONFIG_MPC8260) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ +indirect_##rw##_config_##size(struct pci_controller *hose, \ pci_dev_t dev, int offset, type val) \ { \ u32 b, d,f; \ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \ b = b - hose->first_busno; \ dev = PCI_BDF(b, d, f); \ - out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ + out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ sync(); \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ + return 0; \ } #elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ @@ -60,10 +59,11 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ return 0; \ } -#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) +#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ +indirect_##rw##_config_##size(struct pci_controller *hose, \ pci_dev_t dev, int offset, type val) \ { \ u32 b, d,f; \ @@ -75,36 +75,36 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ else \ out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ + return 0; \ } #else #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ +indirect_##rw##_config_##size(struct pci_controller *hose, \ pci_dev_t dev, int offset, type val) \ { \ u32 b, d,f; \ b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \ b = b - hose->first_busno; \ dev = PCI_BDF(b, d, f); \ - out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ + out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - return 0; \ + return 0; \ } #endif #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \ static int \ -indirect_##rw##_config_##size(struct pci_controller *hose, \ +indirect_##rw##_config_##size(struct pci_controller *hose, \ pci_dev_t dev, int offset, type val) \ { \ unsigned int msr = mfmsr(); \ mtmsr(msr & ~(MSR_EE | MSR_CE)); \ - out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ + out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - out_le32(hose->cfg_addr, 0x00000000); \ + out_le32(hose->cfg_addr, 0x00000000); \ mtmsr(msr); \ - return 0; \ + return 0; \ } INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3) @@ -135,4 +135,3 @@ void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) } #endif /* !__I386__ && !CONFIG_IXDP425 */ -#endif /* CONFIG_PCI */