X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci_indirect.c;h=aee0bd6d93da135fb1dba03789a90e0d0219a5ba;hb=b5cd45bfad3a25db25b40cfda9e7db80e5ee65f7;hp=a8220fb4117c2ac8de84da417814c051caad3254;hpb=f743931f9b4d4e15c9bdfe726bef033ea1f1402c;p=u-boot

diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c
index a8220fb411..aee0bd6d93 100644
--- a/drivers/pci/pci_indirect.c
+++ b/drivers/pci/pci_indirect.c
@@ -3,16 +3,12 @@
  *
  * Copyright (C) 1998 Gabriel Paubert.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
 
-#ifdef CONFIG_PCI
-#if (!defined(__I386__) && !defined(CONFIG_IXDP425))
+#if !defined(__I386__)
 
 #include <asm/processor.h>
 #include <asm/io.h>
@@ -21,29 +17,20 @@
 #define cfg_read(val, addr, type, op)	*val = op((type)(addr))
 #define cfg_write(val, addr, type, op)	op((type *)(addr), (val))
 
-#ifdef CONFIG_IXP425
-extern unsigned char	in_8 (volatile unsigned *addr);
-extern unsigned short	in_le16 (volatile unsigned *addr);
-extern unsigned		in_le32 (volatile unsigned *addr);
-extern void		out_8 (volatile unsigned *addr, char val);
-extern void		out_le16 (volatile unsigned *addr, unsigned short val);
-extern void		out_le32 (volatile unsigned *addr, unsigned int val);
-#endif	/* CONFIG_IXP425 */
-
 #if defined(CONFIG_MPC8260)
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
 static int								 \
-indirect_##rw##_config_##size(struct pci_controller *hose, 		 \
+indirect_##rw##_config_##size(struct pci_controller *hose,		 \
 			      pci_dev_t dev, int offset, type val)	 \
 {									 \
 	u32 b, d,f;							 \
 	b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);		 \
 	b = b - hose->first_busno;					 \
 	dev = PCI_BDF(b, d, f);						 \
-	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); 	 \
+	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);	 \
 	sync();								 \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	 \
-	return 0;    					 		 \
+	return 0;							 \
 }
 #elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)                        \
@@ -60,10 +47,11 @@ indirect_##rw##_config_##size(struct pci_controller *hose,               \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);       \
 	return 0;                                                        \
 }
-#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE)
+#elif defined(CONFIG_440GX)  || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \
+      defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT)
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
 static int								 \
-indirect_##rw##_config_##size(struct pci_controller *hose, 		 \
+indirect_##rw##_config_##size(struct pci_controller *hose,		 \
 			      pci_dev_t dev, int offset, type val)	 \
 {									 \
 	u32 b, d,f;							 \
@@ -75,36 +63,36 @@ indirect_##rw##_config_##size(struct pci_controller *hose, 		 \
 	else                                                             \
 		out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	 \
-	return 0;    					 		 \
+	return 0;							 \
 }
 #else
 #define INDIRECT_PCI_OP(rw, size, type, op, mask)			 \
 static int								 \
-indirect_##rw##_config_##size(struct pci_controller *hose, 		 \
+indirect_##rw##_config_##size(struct pci_controller *hose,		 \
 			      pci_dev_t dev, int offset, type val)	 \
 {									 \
 	u32 b, d,f;							 \
 	b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev);		 \
 	b = b - hose->first_busno;					 \
 	dev = PCI_BDF(b, d, f);						 \
-	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); 	 \
+	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);	 \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	 \
-	return 0;    					 		 \
+	return 0;							 \
 }
 #endif
 
 #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask)		 \
 static int								 \
-indirect_##rw##_config_##size(struct pci_controller *hose, 		 \
+indirect_##rw##_config_##size(struct pci_controller *hose,		 \
 			      pci_dev_t dev, int offset, type val)	 \
 {									 \
 	unsigned int msr = mfmsr();					 \
 	mtmsr(msr & ~(MSR_EE | MSR_CE));				 \
-	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); 	 \
+	out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000);	 \
 	cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);	 \
-	out_le32(hose->cfg_addr, 0x00000000); 				 \
+	out_le32(hose->cfg_addr, 0x00000000);				 \
 	mtmsr(msr);							 \
-	return 0;    					 		 \
+	return 0;							 \
 }
 
 INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3)
@@ -134,5 +122,4 @@ void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
 	hose->cfg_data = (unsigned char *) cfg_data;
 }
 
-#endif	/* !__I386__ && !CONFIG_IXDP425 */
-#endif	/* CONFIG_PCI */
+#endif	/* !__I386__ */