X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpci%2Fpci_rom.c;h=8949ea889792bc81963f471693606f4b137a1f12;hb=3f4e1e8efc5b700473f1920e92b521cb0945a6e3;hp=124b730271d9aabb939df03c685cf5f4ea5206d2;hpb=bdc88d4eb31e2bc84afb427c216c79e87a4233ef;p=u-boot diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 124b730271..8949ea8897 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -25,28 +25,22 @@ #include #include +#include #include #include #include #include #include #include +#include -#ifdef CONFIG_HAVE_ACPI_RESUME -#include -#endif - -__weak bool board_should_run_oprom(pci_dev_t dev) +__weak bool board_should_run_oprom(struct udevice *dev) { return true; } -static bool should_load_oprom(pci_dev_t dev) +static bool should_load_oprom(struct udevice *dev) { -#ifdef CONFIG_HAVE_ACPI_RESUME - if (acpi_get_slp_type() == 3) - return false; -#endif if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM)) return 1; if (board_should_run_oprom(dev)) @@ -60,40 +54,38 @@ __weak uint32_t board_map_oprom_vendev(uint32_t vendev) return vendev; } -static int pci_rom_probe(pci_dev_t dev, uint class, - struct pci_rom_header **hdrp) +static int pci_rom_probe(struct udevice *dev, struct pci_rom_header **hdrp) { + struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); struct pci_rom_header *rom_header; struct pci_rom_data *rom_data; - u16 vendor, device; u16 rom_vendor, rom_device; + u32 rom_class; u32 vendev; u32 mapped_vendev; u32 rom_address; - pci_read_config_word(dev, PCI_VENDOR_ID, &vendor); - pci_read_config_word(dev, PCI_DEVICE_ID, &device); - vendev = vendor << 16 | device; + vendev = pplat->vendor << 16 | pplat->device; mapped_vendev = board_map_oprom_vendev(vendev); if (vendev != mapped_vendev) debug("Device ID mapped to %#08x\n", mapped_vendev); -#ifdef CONFIG_X86_OPTION_ROM_ADDR - rom_address = CONFIG_X86_OPTION_ROM_ADDR; +#ifdef CONFIG_VGA_BIOS_ADDR + rom_address = CONFIG_VGA_BIOS_ADDR; #else - pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK); - pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address); + + dm_pci_read_config32(dev, PCI_ROM_ADDRESS, &rom_address); if (rom_address == 0x00000000 || rom_address == 0xffffffff) { debug("%s: rom_address=%x\n", __func__, rom_address); return -ENOENT; } /* Enable expansion ROM address decoding. */ - pci_write_config_dword(dev, PCI_ROM_ADDRESS, - rom_address | PCI_ROM_ADDRESS_ENABLE); + dm_pci_write_config32(dev, PCI_ROM_ADDRESS, + rom_address | PCI_ROM_ADDRESS_ENABLE); #endif debug("Option ROM address %x\n", rom_address); - rom_header = (struct pci_rom_header *)rom_address; + rom_header = (struct pci_rom_header *)(unsigned long)rom_address; debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n", le16_to_cpu(rom_header->signature), @@ -102,6 +94,10 @@ static int pci_rom_probe(pci_dev_t dev, uint class, if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) { printf("Incorrect expansion ROM header signature %04x\n", le16_to_cpu(rom_header->signature)); +#ifndef CONFIG_VGA_BIOS_ADDR + /* Disable expansion ROM address decoding */ + dm_pci_write_config32(dev, PCI_ROM_ADDRESS, rom_address); +#endif return -EINVAL; } @@ -113,27 +109,27 @@ static int pci_rom_probe(pci_dev_t dev, uint class, rom_vendor, rom_device); /* If the device id is mapped, a mismatch is expected */ - if ((vendor != rom_vendor || device != rom_device) && + if ((pplat->vendor != rom_vendor || pplat->device != rom_device) && (vendev == mapped_vendev)) { printf("ID mismatch: vendor ID %04x, device ID %04x\n", rom_vendor, rom_device); - return -EPERM; + /* Continue anyway */ } - debug("PCI ROM image, Class Code %04x%02x, Code Type %02x\n", - rom_data->class_hi, rom_data->class_lo, rom_data->type); + rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo; + debug("PCI ROM image, Class Code %06x, Code Type %02x\n", + rom_class, rom_data->type); - if (class != ((rom_data->class_hi << 8) | rom_data->class_lo)) { - debug("Class Code mismatch ROM %08x, dev %08x\n", - (rom_data->class_hi << 8) | rom_data->class_lo, - class); + if (pplat->class != rom_class) { + debug("Class Code mismatch ROM %06x, dev %06x\n", + rom_class, pplat->class); } *hdrp = rom_header; return 0; } -int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header, +int pci_rom_load(struct pci_rom_header *rom_header, struct pci_rom_header **ram_headerp) { struct pci_rom_data *rom_data; @@ -181,7 +177,7 @@ int pci_rom_load(uint16_t class, struct pci_rom_header *rom_header, return 0; } -static struct vbe_mode_info mode_info; +struct vbe_mode_info mode_info; int vbe_get_video_info(struct graphic_device *gdev) { @@ -197,6 +193,7 @@ int vbe_get_video_info(struct graphic_device *gdev) gdev->gdfBytesPP = vesa->bits_per_pixel / 8; switch (vesa->bits_per_pixel) { + case 32: case 24: gdev->gdfIndex = GDF_32BIT_X888RGB; break; @@ -223,17 +220,47 @@ int vbe_get_video_info(struct graphic_device *gdev) #endif } -int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate) +void setup_video(struct screen_info *screen_info) +{ + struct vesa_mode_info *vesa = &mode_info.vesa; + + /* Sanity test on VESA parameters */ + if (!vesa->x_resolution || !vesa->y_resolution) + return; + + screen_info->orig_video_isVGA = VIDEO_TYPE_VLFB; + + screen_info->lfb_width = vesa->x_resolution; + screen_info->lfb_height = vesa->y_resolution; + screen_info->lfb_depth = vesa->bits_per_pixel; + screen_info->lfb_linelength = vesa->bytes_per_scanline; + screen_info->lfb_base = vesa->phys_base_ptr; + screen_info->lfb_size = + ALIGN(screen_info->lfb_linelength * screen_info->lfb_height, + 65536); + screen_info->lfb_size >>= 16; + screen_info->red_size = vesa->red_mask_size; + screen_info->red_pos = vesa->red_mask_pos; + screen_info->green_size = vesa->green_mask_size; + screen_info->green_pos = vesa->green_mask_pos; + screen_info->blue_size = vesa->blue_mask_size; + screen_info->blue_pos = vesa->blue_mask_pos; + screen_info->rsvd_size = vesa->reserved_mask_size; + screen_info->rsvd_pos = vesa->reserved_mask_pos; +} + +int dm_pci_run_vga_bios(struct udevice *dev, int (*int15_handler)(void), + int exec_method) { + struct pci_child_platdata *pplat = dev_get_parent_platdata(dev); struct pci_rom_header *rom, *ram; int vesa_mode = -1; - uint16_t class; + bool emulate; int ret; /* Only execute VGA ROMs */ - pci_read_config_word(dev, PCI_CLASS_DEVICE, &class); - if ((class ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { - debug("%s: Class %#x, should be %#x\n", __func__, class, + if (((pplat->class >> 8) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) { + debug("%s: Class %#x, should be %#x\n", __func__, pplat->class, PCI_CLASS_DISPLAY_VGA); return -ENODEV; } @@ -241,11 +268,11 @@ int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate) if (!should_load_oprom(dev)) return -ENXIO; - ret = pci_rom_probe(dev, class, &rom); + ret = pci_rom_probe(dev, &rom); if (ret) return ret; - ret = pci_rom_load(class, rom, &ram); + ret = pci_rom_load(rom, &ram); if (ret) return ret; @@ -257,31 +284,48 @@ int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), bool emulate) vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE; #endif debug("Selected vesa mode %#x\n", vesa_mode); + + if (exec_method & PCI_ROM_USE_NATIVE) { +#ifdef CONFIG_X86 + emulate = false; +#else + if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { + printf("BIOS native execution is only available on x86\n"); + return -ENOSYS; + } + emulate = true; +#endif + } else { +#ifdef CONFIG_BIOSEMU + emulate = true; +#else + if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) { + printf("BIOS emulation not available - see CONFIG_BIOSEMU\n"); + return -ENOSYS; + } + emulate = false; +#endif + } + if (emulate) { #ifdef CONFIG_BIOSEMU BE_VGAInfo *info; - ret = biosemu_setup(dev, &info); + ret = biosemu_setup(dm_pci_get_bdf(dev), &info); if (ret) return ret; biosemu_set_interrupt_handler(0x15, int15_handler); - ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true, - vesa_mode, &mode_info); + ret = biosemu_run(dm_pci_get_bdf(dev), (uchar *)ram, 1 << 16, + info, true, vesa_mode, &mode_info); if (ret) return ret; -#else - printf("BIOS emulation not available - see CONFIG_BIOSEMU\n"); - return -ENOSYS; #endif } else { #ifdef CONFIG_X86 bios_set_interrupt_handler(0x15, int15_handler); - bios_run_on_x86(dev, (unsigned long)ram, vesa_mode, - &mode_info); -#else - printf("BIOS native execution is only available on x86\n"); - return -ENOSYS; + bios_run_on_x86(dm_pci_get_bdf(dev), (unsigned long)ram, + vesa_mode, &mode_info); #endif } debug("Final vesa mode %#x\n", mode_info.video_mode);