X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpcmcia%2Fmarubun_pcmcia.c;h=f715dec5f138f55decd3026ddfdf42c80c649e2f;hb=c5d02825aeb39a74e4faf789bf94a8610c9a1d0f;hp=7b112af922671fd8296eef3fcbe94c24044b79d7;hpb=61fb15c516fef5631e305f1976d7b3a679725856;p=u-boot diff --git a/drivers/pcmcia/marubun_pcmcia.c b/drivers/pcmcia/marubun_pcmcia.c index 7b112af922..f715dec5f1 100644 --- a/drivers/pcmcia/marubun_pcmcia.c +++ b/drivers/pcmcia/marubun_pcmcia.c @@ -25,32 +25,33 @@ #include #include -#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +#undef CONFIG_PCMCIA + +#if defined(CONFIG_CMD_PCMCIA) #define CONFIG_PCMCIA #endif -#if (CONFIG_COMMANDS & CFG_CMD_IDE) +#if defined(CONFIG_CMD_IDE) #define CONFIG_PCMCIA #endif -#if defined(CONFIG_PCMCIA) \ - && (defined(CONFIG_MARUBUN_PCCARD)) +#if defined(CONFIG_PCMCIA) /* MR-SHPC-01 register */ -#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4) -#define MRSHPC_OPTION (CFG_MARUBUN_MRSHPC + 6) -#define MRSHPC_CSR (CFG_MARUBUN_MRSHPC + 8) -#define MRSHPC_ISR (CFG_MARUBUN_MRSHPC + 10) -#define MRSHPC_ICR (CFG_MARUBUN_MRSHPC + 12) -#define MRSHPC_CPWCR (CFG_MARUBUN_MRSHPC + 14) -#define MRSHPC_MW0CR1 (CFG_MARUBUN_MRSHPC + 16) -#define MRSHPC_MW1CR1 (CFG_MARUBUN_MRSHPC + 18) -#define MRSHPC_IOWCR1 (CFG_MARUBUN_MRSHPC + 20) -#define MRSHPC_MW0CR2 (CFG_MARUBUN_MRSHPC + 22) -#define MRSHPC_MW1CR2 (CFG_MARUBUN_MRSHPC + 24) -#define MRSHPC_IOWCR2 (CFG_MARUBUN_MRSHPC + 26) -#define MRSHPC_CDCR (CFG_MARUBUN_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (CFG_MARUBUN_MRSHPC + 30) +#define MRSHPC_MODE (CONFIG_SYS_MARUBUN_MRSHPC + 4) +#define MRSHPC_OPTION (CONFIG_SYS_MARUBUN_MRSHPC + 6) +#define MRSHPC_CSR (CONFIG_SYS_MARUBUN_MRSHPC + 8) +#define MRSHPC_ISR (CONFIG_SYS_MARUBUN_MRSHPC + 10) +#define MRSHPC_ICR (CONFIG_SYS_MARUBUN_MRSHPC + 12) +#define MRSHPC_CPWCR (CONFIG_SYS_MARUBUN_MRSHPC + 14) +#define MRSHPC_MW0CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 16) +#define MRSHPC_MW1CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 18) +#define MRSHPC_IOWCR1 (CONFIG_SYS_MARUBUN_MRSHPC + 20) +#define MRSHPC_MW0CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 22) +#define MRSHPC_MW1CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 24) +#define MRSHPC_IOWCR2 (CONFIG_SYS_MARUBUN_MRSHPC + 26) +#define MRSHPC_CDCR (CONFIG_SYS_MARUBUN_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (CONFIG_SYS_MARUBUN_MRSHPC + 30) int pcmcia_on (void) { @@ -97,8 +98,8 @@ int pcmcia_on (void) outw(0x0000,MRSHPC_ISR); outw(0x2000,MRSHPC_ICR); - outb(0x00,(CFG_MARUBUN_MW2 + 0x206)); - outb(0x42,(CFG_MARUBUN_MW2 + 0x200)); + outb(0x00,(CONFIG_SYS_MARUBUN_MW2 + 0x206)); + outb(0x42,(CONFIG_SYS_MARUBUN_MW2 + 0x200)); return 0; } @@ -110,4 +111,4 @@ int pcmcia_off (void) return 0; } -#endif /* CONFIG_MARUBUN_PCCARD */ +#endif /* CONFIG_PCMCIA */