X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpcmcia%2Fmpc8xx_pcmcia.c;h=1b41e391583d16d76db701076c0a94f5394acae9;hb=b9d33fa06c174e7fb4c8cd4bfec5cfff87f301e8;hp=14477a4487faa326b3931f19e961443f13a2e21a;hpb=53677ef18e25c97ac613349087c5cb33ae5a2741;p=u-boot

diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c
index 14477a4487..1b41e39158 100644
--- a/drivers/pcmcia/mpc8xx_pcmcia.c
+++ b/drivers/pcmcia/mpc8xx_pcmcia.c
@@ -1,8 +1,7 @@
 #include <common.h>
-#if defined(CONFIG_8xx)
 #include <mpc8xx.h>
-#endif
 #include <pcmcia.h>
+#include <linux/compiler.h>
 
 #undef	CONFIG_PCMCIA
 
@@ -14,7 +13,7 @@
 #define	CONFIG_PCMCIA
 #endif
 
-#if defined(CONFIG_8xx)	&& defined(CONFIG_PCMCIA)
+#if defined(CONFIG_PCMCIA)
 
 #if	defined(CONFIG_IDE_8xx_PCCARD)
 extern int check_ide_device (int slot);
@@ -34,8 +33,8 @@ static u_int m8xx_get_speed(u_int ns, u_int is_io);
 
 /* look up table for pgcrx registers */
 u_int *pcmcia_pgcrx[2] = {
-	&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcra,
-	&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pgcrb,
+	&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcra,
+	&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pgcrb,
 };
 
 /*
@@ -59,21 +58,9 @@ static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
 
 /* -------------------------------------------------------------------- */
 
-#ifdef	CONFIG_HMI10
-#define	HMI10_FRAM_TIMING	(	PCMCIA_SHT(2)	\
-				|	PCMCIA_SST(2)	\
-				|	PCMCIA_SL(4))
-#endif
-
-#if	defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
-#define	CFG_PCMCIA_TIMING	(	PCMCIA_SHT(9)	\
-				|	PCMCIA_SST(3)	\
-				|	PCMCIA_SL(12))
-#else
-#define	CFG_PCMCIA_TIMING	(	PCMCIA_SHT(2)	\
+#define	CONFIG_SYS_PCMCIA_TIMING	(	PCMCIA_SHT(2)	\
 				|	PCMCIA_SST(4)	\
 				|	PCMCIA_SL(9))
-#endif
 
 /* -------------------------------------------------------------------- */
 
@@ -81,19 +68,19 @@ int pcmcia_on (void)
 {
 	u_long reg, base;
 	pcmcia_win_t *win;
-	u_int slotbit;
 	u_int rc, slot;
+	__maybe_unused u_int slotbit;
 	int i;
 
 	debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
 
 	/* intialize the fixed memory windows */
-	win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
-	base = CFG_PCMCIA_MEM_ADDR;
+	win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0);
+	base = CONFIG_SYS_PCMCIA_MEM_ADDR;
 
-	if((reg = m8xx_get_graycode(CFG_PCMCIA_MEM_SIZE)) == -1) {
+	if((reg = m8xx_get_graycode(CONFIG_SYS_PCMCIA_MEM_SIZE)) == -1) {
 		printf ("Cannot set window size to 0x%08x\n",
-			CFG_PCMCIA_MEM_SIZE);
+			CONFIG_SYS_PCMCIA_MEM_SIZE);
 		return (1);
 	}
 
@@ -108,24 +95,13 @@ int pcmcia_on (void)
 		switch (i) {
 #ifdef	CONFIG_IDE_8xx_PCCARD
 		case 4:
-#ifdef	CONFIG_HMI10
-		{	/* map FRAM area */
-			win->or = (	PCMCIA_BSIZE_256K
-				|	PCMCIA_PPS_8
-				|	PCMCIA_PRS_ATTR
-				|	slotbit
-				|	PCMCIA_PV
-				|	HMI10_FRAM_TIMING );
-			break;
-		}
-#endif
 		case 0:	{	/* map attribute memory */
 			win->or = (	PCMCIA_BSIZE_64M
 				|	PCMCIA_PPS_8
 				|	PCMCIA_PRS_ATTR
 				|	slotbit
 				|	PCMCIA_PV
-				|	CFG_PCMCIA_TIMING );
+				|	CONFIG_SYS_PCMCIA_TIMING );
 			break;
 		}
 		case 5:
@@ -135,7 +111,7 @@ int pcmcia_on (void)
 				|	PCMCIA_PRS_IO
 				|	slotbit
 				|	PCMCIA_PV
-				|	CFG_PCMCIA_TIMING );
+				|	CONFIG_SYS_PCMCIA_TIMING );
 			break;
 		}
 		case 6:
@@ -145,22 +121,10 @@ int pcmcia_on (void)
 				|	PCMCIA_PRS_IO
 				|	slotbit
 				|	PCMCIA_PV
-				|	CFG_PCMCIA_TIMING );
+				|	CONFIG_SYS_PCMCIA_TIMING );
 			break;
 		}
 #endif	/* CONFIG_IDE_8xx_PCCARD */
-#ifdef	CONFIG_HMI10
-		case 3: {	/* map I/O window for 4xUART data/ctrl */
-			win->br += 0x40000;
-			win->or = (	PCMCIA_BSIZE_256K
-				|	PCMCIA_PPS_8
-				|	PCMCIA_PRS_IO
-				|	slotbit
-				|	PCMCIA_PV
-				|	CFG_PCMCIA_TIMING );
-			break;
-		}
-#endif	/* CONFIG_HMI10 */
 		default:	/* set to not valid */
 			win->or = 0;
 			break;
@@ -168,7 +132,7 @@ int pcmcia_on (void)
 
 		debug ("MemWin %d: PBR 0x%08lX  POR %08lX\n",
 		       i, win->br, win->or);
-		base += CFG_PCMCIA_MEM_SIZE;
+		base += CONFIG_SYS_PCMCIA_MEM_SIZE;
 		++win;
 	}
 
@@ -198,14 +162,14 @@ int pcmcia_off (void)
 	printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
 
 	/* clear interrupt state, and disable interrupts */
-	((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pscr =  PCMCIA_MASK(_slot_);
-	((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
+	((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pscr =  PCMCIA_MASK(_slot_);
+	((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_per &= ~PCMCIA_MASK(_slot_);
 
 	/* turn off interrupt and disable CxOE */
 	PCMCIA_PGCRX(_slot_) = __MY_PCMCIA_GCRX_CXOE;
 
 	/* turn off memory windows */
-	win = (pcmcia_win_t *)(&((immap_t *)CFG_IMMR)->im_pcmcia.pcmc_pbr0);
+	win = (pcmcia_win_t *)(&((immap_t *)CONFIG_SYS_IMMR)->im_pcmcia.pcmc_pbr0);
 
 	for (i=0; i<PCMCIA_MEM_WIN_NO; ++i) {
 		/* disable memory window */
@@ -241,16 +205,6 @@ static u_int m8xx_get_graycode(u_int size)
 
 #if	0
 
-#if	defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPXLITE)
-
-/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
- * SYPCR is write once only, therefore must the slowest memory be faster
- * than the bus monitor or we will get a machine check due to the bus timeout.
- */
-#undef	PCMCIA_BMT_LIMIT
-#define	PCMCIA_BMT_LIMIT (6*8)
-#endif
-
 static u_int m8xx_get_speed(u_int ns, u_int is_io)
 {
 	u_int reg, clocks, psst, psl, psht;
@@ -301,4 +255,4 @@ static u_int m8xx_get_speed(u_int ns, u_int is_io)
 }
 #endif	/* 0 */
 
-#endif	/* CONFIG_8xx && CONFIG_PCMCIA */
+#endif	/* CONFIG_PCMCIA */