X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpcmcia%2Fmpc8xx_pcmcia.c;h=1b41e391583d16d76db701076c0a94f5394acae9;hb=b9d33fa06c174e7fb4c8cd4bfec5cfff87f301e8;hp=663827780e9a27d887dd4b9cd5cf568ad03cd214;hpb=d2a3e911390f9fc4d8c0ee4b3c7fc75f4fd3fd19;p=u-boot

diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c
index 663827780e..1b41e39158 100644
--- a/drivers/pcmcia/mpc8xx_pcmcia.c
+++ b/drivers/pcmcia/mpc8xx_pcmcia.c
@@ -58,15 +58,9 @@ static const u_int m8xx_size_to_gray[M8XX_SIZES_NO] =
 
 /* -------------------------------------------------------------------- */
 
-#if	defined(CONFIG_LWMON) || defined(CONFIG_NSCU)
-#define	CONFIG_SYS_PCMCIA_TIMING	(	PCMCIA_SHT(9)	\
-				|	PCMCIA_SST(3)	\
-				|	PCMCIA_SL(12))
-#else
 #define	CONFIG_SYS_PCMCIA_TIMING	(	PCMCIA_SHT(2)	\
 				|	PCMCIA_SST(4)	\
 				|	PCMCIA_SL(9))
-#endif
 
 /* -------------------------------------------------------------------- */
 
@@ -211,16 +205,6 @@ static u_int m8xx_get_graycode(u_int size)
 
 #if	0
 
-#if defined(CONFIG_RPXLITE)
-
-/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
- * SYPCR is write once only, therefore must the slowest memory be faster
- * than the bus monitor or we will get a machine check due to the bus timeout.
- */
-#undef	PCMCIA_BMT_LIMIT
-#define	PCMCIA_BMT_LIMIT (6*8)
-#endif
-
 static u_int m8xx_get_speed(u_int ns, u_int is_io)
 {
 	u_int reg, clocks, psst, psl, psht;