X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpinctrl%2Fpinctrl-single.c;h=a38d774ddc9643597bf6ceb87548d35ff380cd31;hb=f19955a01482d118eac0fdaf530ec6e5b08cf414;hp=d2dcec0d135e04da3b9de3c8aa8cff12363858a6;hpb=44d5c371a63e56eb53866b645e75396fa1d95510;p=u-boot

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index d2dcec0d13..a38d774ddc 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -5,7 +5,7 @@
  */
 
 #include <common.h>
-#include <dm/device.h>
+#include <dm.h>
 #include <dm/pinctrl.h>
 #include <libfdt.h>
 #include <asm/io.h>
@@ -47,27 +47,27 @@ static int single_configure_pins(struct udevice *dev,
 	int n, reg;
 	u32 val;
 
-	for (n = 0; n < count; n++) {
+	for (n = 0; n < count; n++, pins++) {
 		reg = fdt32_to_cpu(pins->reg);
 		if ((reg < 0) || (reg > pdata->offset)) {
 			dev_dbg(dev, "  invalid register offset 0x%08x\n", reg);
-			pins++;
 			continue;
 		}
 		reg += pdata->base;
+		val = fdt32_to_cpu(pins->val) & pdata->mask;
 		switch (pdata->width) {
+		case 16:
+			writew((readw(reg) & ~pdata->mask) | val, reg);
+			break;
 		case 32:
-			val = readl(reg) & ~pdata->mask;
-			val |= fdt32_to_cpu(pins->val) & pdata->mask;
-			writel(val, reg);
-			dev_dbg(dev, "  reg/val 0x%08x/0x%08x\n",
-				reg, val);
+			writel((readl(reg) & ~pdata->mask) | val, reg);
 			break;
 		default:
 			dev_warn(dev, "unsupported register width %i\n",
 				 pdata->width);
+			continue;
 		}
-		pins++;
+		dev_dbg(dev, "  reg/val 0x%08x/0x%08x\n",reg, val);
 	}
 	return 0;
 }
@@ -79,7 +79,8 @@ static int single_set_state(struct udevice *dev,
 	const struct single_fdt_pin_cfg *prop;
 	int len;
 
-	prop = fdt_getprop(fdt, config->of_offset, "pinctrl-single,pins", &len);
+	prop = fdt_getprop(fdt, dev_of_offset(config), "pinctrl-single,pins",
+			   &len);
 	if (prop) {
 		dev_dbg(dev, "configuring pins for %s\n", config->name);
 		if (len % sizeof(struct single_fdt_pin_cfg)) {
@@ -100,23 +101,23 @@ static int single_ofdata_to_platdata(struct udevice *dev)
 	int res;
 	struct single_pdata *pdata = dev->platdata;
 
-	pdata->width = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	pdata->width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				      "pinctrl-single,register-width", 0);
 
-	res = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+	res = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 				   "reg", of_reg, 2);
 	if (res)
 		return res;
 	pdata->offset = of_reg[1] - pdata->width / 8;
 
-	addr = dev_get_addr(dev);
+	addr = devfdt_get_addr(dev);
 	if (addr == FDT_ADDR_T_NONE) {
 		dev_dbg(dev, "no valid base register address\n");
 		return -EINVAL;
 	}
 	pdata->base = addr;
 
-	pdata->mask = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	pdata->mask = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				     "pinctrl-single,function-mask",
 				     0xffffffff);
 	return 0;