X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fpower%2Fftpmu010.c;h=78128c64139b685626f0b39d175d66142a00d4ea;hb=04072cba1983fd8b3140b1b97e3d544359d178a0;hp=7924ac101ca3e5d81a34fcb6dae1d4c073990aa2;hpb=f8ea15f769773943050fa3ba444a5514066441d4;p=u-boot diff --git a/drivers/power/ftpmu010.c b/drivers/power/ftpmu010.c index 7924ac101c..78128c6413 100644 --- a/drivers/power/ftpmu010.c +++ b/drivers/power/ftpmu010.c @@ -6,29 +6,17 @@ * Shawn Lin, Andes Technology Corporation * Macpaul Lin, Andes Technology Corporation * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * SPDX-License-Identifier: GPL-2.0+ */ #include #include -#include "ftpmu010.h" - -static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; +#include +/* OSCC: OSC Control Register */ void ftpmu010_32768osc_enable(void) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int oscc; /* enable the 32768Hz oscillator */ @@ -46,8 +34,31 @@ void ftpmu010_32768osc_enable(void) writel(oscc, &pmu->OSCC); } +/* MFPSR: Multi-Function Port Setting Register */ +void ftpmu010_mfpsr_select_dev(unsigned int dev) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int mfpsr; + + mfpsr = readl(&pmu->MFPSR); + mfpsr |= dev; + writel(mfpsr, &pmu->MFPSR); +} + +void ftpmu010_mfpsr_diselect_dev(unsigned int dev) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int mfpsr; + + mfpsr = readl(&pmu->MFPSR); + mfpsr &= ~dev; + writel(mfpsr, &pmu->MFPSR); +} + +/* PDLLCR0: PLL/DLL Control Register 0 */ void ftpmu010_dlldis_disable(void) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int pdllcr0; pdllcr0 = readl(&pmu->PDLLCR0); @@ -57,9 +68,21 @@ void ftpmu010_dlldis_disable(void) void ftpmu010_sdram_clk_disable(unsigned int cr0) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int pdllcr0; pdllcr0 = readl(&pmu->PDLLCR0); pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); writel(pdllcr0, &pmu->PDLLCR0); } + +/* SDRAMHTC: SDRAM Signal Hold Time Control */ +void ftpmu010_sdramhtc_set(unsigned int val) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int sdramhtc; + + sdramhtc = readl(&pmu->SDRAMHTC); + sdramhtc |= val; + writel(sdramhtc, &pmu->SDRAMHTC); +}