X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fqe%2Fuccf.c;h=85386bfc7084aeaf251934f9c8b4052a097d9ffb;hb=04372fb89797f8206fd44844df4ca95aaa62b9f9;hp=25f74826c00a2f2fbf5e862340b602eb8c6a05a0;hpb=7737d5c658c606f999dfbe3e86b0fed49e5c50ef;p=u-boot

diff --git a/drivers/qe/uccf.c b/drivers/qe/uccf.c
index 25f74826c0..85386bfc70 100644
--- a/drivers/qe/uccf.c
+++ b/drivers/qe/uccf.c
@@ -4,31 +4,17 @@
  * Dave Liu <daveliu@freescale.com>
  * based on source code of Shlomi Gridish
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include "common.h"
 #include "malloc.h"
 #include "asm/errno.h"
 #include "asm/io.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
 #include "qe.h"
 #include "uccf.h"
 
-#if defined(CONFIG_QE)
 void ucc_fast_transmit_on_demand(ucc_fast_private_t *uccf)
 {
 	out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
@@ -46,7 +32,7 @@ u32 ucc_fast_get_qe_cr_subblock(int ucc_num)
 		case 6:	return QE_CR_SUBBLOCK_UCCFAST7;
 		case 7:	return QE_CR_SUBBLOCK_UCCFAST8;
 		default:	return QE_CR_SUBBLOCK_INVALID;
-    }
+	}
 }
 
 static void ucc_get_cmxucr_reg(int ucc_num, volatile u32 **p_cmxucr,
@@ -100,9 +86,9 @@ static void ucc_get_cmxucr_reg(int ucc_num, volatile u32 **p_cmxucr,
 
 static int ucc_set_clk_src(int ucc_num, qe_clock_e clock, comm_dir_e mode)
 {
-	volatile u32	*p_cmxucr;
-	u8		reg_num;
-	u8		shift;
+	volatile u32	*p_cmxucr = NULL;
+	u8		reg_num = 0;
+	u8		shift = 0;
 	u32		clockBits;
 	u32		clockMask;
 	int		source = -1;
@@ -369,7 +355,7 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)
 		out_be16(&uf_regs->urfset, UCC_GETH_URFSET_INIT);
 		out_be16(&uf_regs->utfs, UCC_GETH_UTFS_INIT);
 		out_be16(&uf_regs->utfet, UCC_GETH_UTFET_INIT);
- 		out_be16(&uf_regs->utftt, UCC_GETH_UTFTT_INIT);
+		out_be16(&uf_regs->utftt, UCC_GETH_UTFTT_INIT);
 	}
 
 	/* Rx clock routing */
@@ -401,4 +387,3 @@ int ucc_fast_init(ucc_fast_info_t *uf_info, ucc_fast_private_t  **uccf_ret)
 	*uccf_ret = uccf;
 	return 0;
 }
-#endif /* CONFIG_QE */