X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Frtc%2Fds1337.c;h=5bb9f942c167ebe51d0d5b6374b82b16ab8d7c7b;hb=d978780b2e676c005460cd561f4f15b5220bdf49;hp=c636ac5948f718879a3bd11ebaa588d24a9dc856;hpb=6a40ef62c4300e9f606deef0a4618cbc4b514a51;p=u-boot diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c index c636ac5948..5bb9f942c1 100644 --- a/drivers/rtc/ds1337.c +++ b/drivers/rtc/ds1337.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2001, 2002 + * (C) Copyright 2001-2008 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * Keith Outwater, keith_outwater@mvis.com` * @@ -32,17 +32,7 @@ #include #include -#if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE) - -/*---------------------------------------------------------------------*/ -#undef DEBUG_RTC - -#ifdef DEBUG_RTC -#define DEBUGR(fmt,args...) printf(fmt ,##args) -#else -#define DEBUGR(fmt,args...) -#endif -/*---------------------------------------------------------------------*/ +#if defined(CONFIG_CMD_DATE) /* * RTC register addresses @@ -56,36 +46,35 @@ #define RTC_YR_REG_ADDR 0x6 #define RTC_CTL_REG_ADDR 0x0e #define RTC_STAT_REG_ADDR 0x0f +#define RTC_TC_REG_ADDR 0x10 /* * RTC control register bits */ -#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */ -#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */ -#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */ -#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ -#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */ -#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */ +#define RTC_CTL_BIT_A1IE 0x1 /* Alarm 1 interrupt enable */ +#define RTC_CTL_BIT_A2IE 0x2 /* Alarm 2 interrupt enable */ +#define RTC_CTL_BIT_INTCN 0x4 /* Interrupt control */ +#define RTC_CTL_BIT_RS1 0x8 /* Rate select 1 */ +#define RTC_CTL_BIT_RS2 0x10 /* Rate select 2 */ +#define RTC_CTL_BIT_DOSC 0x80 /* Disable Oscillator */ /* * RTC status register bits */ -#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ -#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ -#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ +#define RTC_STAT_BIT_A1F 0x1 /* Alarm 1 flag */ +#define RTC_STAT_BIT_A2F 0x2 /* Alarm 2 flag */ +#define RTC_STAT_BIT_OSF 0x80 /* Oscillator stop flag */ static uchar rtc_read (uchar reg); static void rtc_write (uchar reg, uchar val); -static uchar bin2bcd (unsigned int n); -static unsigned bcd2bin (uchar c); - /* * Get the current time from the RTC */ -void rtc_get (struct rtc_time *tmp) +int rtc_get (struct rtc_time *tmp) { + int rel = 0; uchar sec, min, hour, mday, wday, mon_cent, year, control, status; control = rtc_read (RTC_CTL_REG_ADDR); @@ -98,7 +87,7 @@ void rtc_get (struct rtc_time *tmp) mon_cent = rtc_read (RTC_MON_REG_ADDR); year = rtc_read (RTC_YR_REG_ADDR); - DEBUGR ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " + debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x " "hr: %02x min: %02x sec: %02x control: %02x status: %02x\n", year, mon_cent, mday, wday, hour, min, sec, control, status); @@ -107,6 +96,7 @@ void rtc_get (struct rtc_time *tmp) /* clear the OSF flag */ rtc_write (RTC_STAT_REG_ADDR, rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF); + rel = -1; } tmp->tm_sec = bcd2bin (sec & 0x7F); @@ -119,20 +109,22 @@ void rtc_get (struct rtc_time *tmp) tmp->tm_yday = 0; tmp->tm_isdst= 0; - DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); + + return rel; } /* * Set the RTC */ -void rtc_set (struct rtc_time *tmp) +int rtc_set (struct rtc_time *tmp) { uchar century; - DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); @@ -146,6 +138,8 @@ void rtc_set (struct rtc_time *tmp) rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour)); rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min)); rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); + + return 0; } @@ -154,11 +148,21 @@ void rtc_set (struct rtc_time *tmp) * SQW/INTB* pin and program it for 32,768 Hz output. Note that * according to the datasheet, turning on the square wave output * increases the current drain on the backup battery from about - * 600 nA to 2uA. + * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn + * off the OSC output. */ +#ifdef CONFIG_SYS_RTC_DS1337_NOOSC + #define RTC_DS1337_RESET_VAL \ + (RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) +#else + #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2) +#endif void rtc_reset (void) { - rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2); + rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL); +#ifdef CONFIG_SYS_DS1339_TCR_VAL + rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL); +#endif } @@ -169,23 +173,13 @@ void rtc_reset (void) static uchar rtc_read (uchar reg) { - return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg)); + return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg)); } static void rtc_write (uchar reg, uchar val) { - i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val); -} - -static unsigned bcd2bin (uchar n) -{ - return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F)); -} - -static unsigned char bin2bcd (unsigned int n) -{ - return (((n / 10) << 4) | (n % 10)); + i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val); } #endif