X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Frtc%2Fds1337.c;h=7abf041aabd9bf91e759e358f95a0d3e8df561db;hb=1ed3b710d04e21dd34f61cfd129cbe18bef91598;hp=c636ac5948f718879a3bd11ebaa588d24a9dc856;hpb=521dcd30b9cc5b72cd27ae04104f19369251aa20;p=u-boot

diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c
index c636ac5948..7abf041aab 100644
--- a/drivers/rtc/ds1337.c
+++ b/drivers/rtc/ds1337.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001, 2002
+ * (C) Copyright 2001-2008
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  * Keith Outwater, keith_outwater@mvis.com`
  *
@@ -32,7 +32,7 @@
 #include <rtc.h>
 #include <i2c.h>
 
-#if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
 
 /*---------------------------------------------------------------------*/
 #undef DEBUG_RTC
@@ -56,36 +56,35 @@
 #define RTC_YR_REG_ADDR		0x6
 #define RTC_CTL_REG_ADDR	0x0e
 #define RTC_STAT_REG_ADDR	0x0f
+#define RTC_TC_REG_ADDR		0x10
 
 /*
  * RTC control register bits
  */
-#define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable     */
-#define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable     */
-#define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control            */
-#define RTC_CTL_BIT_RS1		0x8	/* Rate select 1                */
-#define RTC_CTL_BIT_RS2		0x10	/* Rate select 2                */
-#define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator           */
+#define RTC_CTL_BIT_A1IE	0x1	/* Alarm 1 interrupt enable	*/
+#define RTC_CTL_BIT_A2IE	0x2	/* Alarm 2 interrupt enable	*/
+#define RTC_CTL_BIT_INTCN	0x4	/* Interrupt control		*/
+#define RTC_CTL_BIT_RS1		0x8	/* Rate select 1		*/
+#define RTC_CTL_BIT_RS2		0x10	/* Rate select 2		*/
+#define RTC_CTL_BIT_DOSC	0x80	/* Disable Oscillator		*/
 
 /*
  * RTC status register bits
  */
-#define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag                 */
-#define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag                 */
-#define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag         */
+#define RTC_STAT_BIT_A1F	0x1	/* Alarm 1 flag			*/
+#define RTC_STAT_BIT_A2F	0x2	/* Alarm 2 flag			*/
+#define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag		*/
 
 
 static uchar rtc_read (uchar reg);
 static void rtc_write (uchar reg, uchar val);
-static uchar bin2bcd (unsigned int n);
-static unsigned bcd2bin (uchar c);
-
 
 /*
  * Get the current time from the RTC
  */
-void rtc_get (struct rtc_time *tmp)
+int rtc_get (struct rtc_time *tmp)
 {
+	int rel = 0;
 	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
 
 	control = rtc_read (RTC_CTL_REG_ADDR);
@@ -107,6 +106,7 @@ void rtc_get (struct rtc_time *tmp)
 		/* clear the OSF flag */
 		rtc_write (RTC_STAT_REG_ADDR,
 			   rtc_read (RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
+		rel = -1;
 	}
 
 	tmp->tm_sec  = bcd2bin (sec & 0x7F);
@@ -122,13 +122,15 @@ void rtc_get (struct rtc_time *tmp)
 	DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
 		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
 		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	return rel;
 }
 
 
 /*
  * Set the RTC
  */
-void rtc_set (struct rtc_time *tmp)
+int rtc_set (struct rtc_time *tmp)
 {
 	uchar century;
 
@@ -146,6 +148,8 @@ void rtc_set (struct rtc_time *tmp)
 	rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
 	rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
 	rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
+
+	return 0;
 }
 
 
@@ -154,11 +158,21 @@ void rtc_set (struct rtc_time *tmp)
  * SQW/INTB* pin and program it for 32,768 Hz output. Note that
  * according to the datasheet, turning on the square wave output
  * increases the current drain on the backup battery from about
- * 600 nA to 2uA.
+ * 600 nA to 2uA. Define CONFIG_SYS_RTC_DS1337_NOOSC if you wish to turn
+ * off the OSC output.
  */
+#ifdef CONFIG_SYS_RTC_DS1337_NOOSC
+ #define RTC_DS1337_RESET_VAL \
+	(RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
+#else
+ #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
+#endif
 void rtc_reset (void)
 {
-	rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2);
+	rtc_write (RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
+#ifdef CONFIG_SYS_DS1339_TCR_VAL
+	rtc_write (RTC_TC_REG_ADDR, CONFIG_SYS_DS1339_TCR_VAL);
+#endif
 }
 
 
@@ -169,23 +183,13 @@ void rtc_reset (void)
 static
 uchar rtc_read (uchar reg)
 {
-	return (i2c_reg_read (CFG_I2C_RTC_ADDR, reg));
+	return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
 }
 
 
 static void rtc_write (uchar reg, uchar val)
 {
-	i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
-}
-
-static unsigned bcd2bin (uchar n)
-{
-	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
-	return (((n / 10) << 4) | (n % 10));
+	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
 }
 
 #endif