X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Frtc%2Fm48t35ax.c;h=021b91f7313c7093731a65fa47914bdf52c3d4be;hb=4f2532c4a4a34f0241ef9bc921044772f19f928d;hp=be29279d0336e3058864c62d4ef27ebbd96a59e9;hpb=47310715f4316a3677b206acf9f83adb7949ecd1;p=u-boot

diff --git a/drivers/rtc/m48t35ax.c b/drivers/rtc/m48t35ax.c
index be29279d03..021b91f731 100644
--- a/drivers/rtc/m48t35ax.c
+++ b/drivers/rtc/m48t35ax.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2001
  * Erik Theisen,  Wave 7 Optics, etheisen@mindspring.com.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -33,12 +17,10 @@
 #include <rtc.h>
 #include <config.h>
 
-#if defined(CONFIG_RTC_M48T35A) && defined(CONFIG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
 
 static uchar rtc_read  (uchar reg);
 static void  rtc_write (uchar reg, uchar val);
-static uchar bin2bcd   (unsigned int n);
-static unsigned bcd2bin(uchar c);
 
 /* ------------------------------------------------------------------------- */
 
@@ -87,7 +69,7 @@ int rtc_get (struct rtc_time *tmp)
 	return 0;
 }
 
-void rtc_set (struct rtc_time *tmp)
+int rtc_set (struct rtc_time *tmp)
 {
 	uchar ccr;			/* Clock control register */
 	uchar century;
@@ -116,6 +98,8 @@ void rtc_set (struct rtc_time *tmp)
 	ccr = rtc_read(0);
 	ccr = ccr & 0x7F;
 	rtc_write(0, ccr);
+
+	return 0;
 }
 
 void rtc_reset (void)
@@ -145,24 +129,14 @@ static uchar rtc_read (uchar reg)
 {
 	uchar val;
 	val = *(unsigned char *)
-		((CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE - 8) + reg);
+		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg);
 	return val;
 }
 
 static void rtc_write (uchar reg, uchar val)
 {
 	*(unsigned char *)
-		((CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE - 8) + reg) = val;
-}
-
-static unsigned bcd2bin (uchar n)
-{
-	return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
-}
-
-static unsigned char bin2bcd (unsigned int n)
-{
-	return (((n / 10) << 4) | (n % 10));
+		((CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE - 8) + reg) = val;
 }
 
 #endif