X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Frtc%2Frv3029.c;h=8033695ba6d8eb2c2de8cdd1a54adfe1069e9f23;hb=9dfa8da709a1589d177d99c597d9b18d8c9a145d;hp=3ebc76887465db606f458ebabc65ae16f3da1239;hpb=5c4fa2eea0d68764766b5996baa5508f64f1f64b;p=u-boot diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c index 3ebc768874..8033695ba6 100644 --- a/drivers/rtc/rv3029.c +++ b/drivers/rtc/rv3029.c @@ -25,6 +25,12 @@ #include #include +#define RTC_RV3029_CTRL1 0x00 +#define RTC_RV3029_CTRL1_EERE (1 << 3) + +#define RTC_RV3029_CTRL_STATUS 0x03 +#define RTC_RV3029_CTRLS_EEBUSY (1 << 7) + #define RTC_RV3029_CTRL_RESET 0x04 #define RTC_RV3029_CTRL_SYS_R (1 << 4) @@ -42,6 +48,12 @@ #define RV3029C2_REG_HR_12_24 (1 << 6) /* 24h/12h mode */ #define RV3029C2_REG_HR_PM (1 << 5) /* PM/AM bit in 12h mode */ +#define RTC_RV3029_EEPROM_CTRL 0x30 +#define RTC_RV3029_TRICKLE_1K (1 << 4) +#define RTC_RV3029_TRICKLE_5K (1 << 5) +#define RTC_RV3029_TRICKLE_20K (1 << 6) +#define RTC_RV3029_TRICKLE_80K (1 << 7) + int rtc_get( struct rtc_time *tmp ) { int ret; @@ -72,12 +84,10 @@ int rtc_get( struct rtc_time *tmp ) tmp->tm_yday = 0; tmp->tm_isdst = 0; -#ifdef RTC_DEBUG - printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + debug( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); -#endif return 0; } @@ -85,11 +95,10 @@ int rtc_set( struct rtc_time *tmp ) { int ret; unsigned char buf[RTC_RV3029_PAGE_LEN]; -#ifdef RTC_DEBUG - printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", + + debug( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, tmp->tm_hour, tmp->tm_min, tmp->tm_sec); -#endif if (tmp->tm_year < 2000) { printf("RTC: year %d < 2000 not possible\n", tmp->tm_year); @@ -110,15 +119,88 @@ int rtc_set( struct rtc_time *tmp ) /* give the RTC some time to update */ udelay(1000); - return 0; + return ret; +} + +/* sets EERE-Bit (automatic EEPROM refresh) */ +static void set_eere_bit(int state) +{ + unsigned char reg_ctrl1; + + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, + ®_ctrl1, 1); + + if (state) + reg_ctrl1 |= RTC_RV3029_CTRL1_EERE; + else + reg_ctrl1 &= (~RTC_RV3029_CTRL1_EERE); + + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL1, 1, + ®_ctrl1, 1); +} + +/* waits until EEPROM page is no longer busy (times out after 10ms*loops) */ +static int wait_eebusy(int loops) +{ + int i; + unsigned char ctrl_status; + + for (i = 0; i < loops; i++) { + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_STATUS, + 1, &ctrl_status, 1); + + if ((ctrl_status & RTC_RV3029_CTRLS_EEBUSY) == 0) + break; + udelay(10000); + } + return i; } void rtc_reset (void) { - int ret; unsigned char buf[RTC_RV3029_PAGE_LEN]; buf[0] = RTC_RV3029_CTRL_SYS_R; - ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_CTRL_RESET, 1, buf, 1); + +#if defined(CONFIG_SYS_RV3029_TCR) + /* + * because EEPROM_CTRL register is in EEPROM page it is necessary to + * disable automatic EEPROM refresh and check if EEPROM is busy + * before EEPORM_CTRL register may be accessed + */ + set_eere_bit(0); + wait_eebusy(100); + /* read current trickle charger setting */ + (void)i2c_read(CONFIG_SYS_I2C_RTC_ADDR, RTC_RV3029_EEPROM_CTRL, + 1, buf, 1); + /* enable automatic EEPROM refresh again */ + set_eere_bit(1); + + /* + * to minimize EEPROM access write trickle charger setting only if it + * differs from current value + */ + if ((buf[0] & 0xF0) != CONFIG_SYS_RV3029_TCR) { + buf[0] = (buf[0] & 0x0F) | CONFIG_SYS_RV3029_TCR; + /* + * write trickle charger setting (disable autom. EEPROM + * refresh and wait until EEPROM is idle) + */ + set_eere_bit(0); + wait_eebusy(100); + (void)i2c_write(CONFIG_SYS_I2C_RTC_ADDR, + RTC_RV3029_EEPROM_CTRL, 1, buf, 1); + /* + * it is necessary to wait 10ms before EEBUSY-Bit may be read + * (this is not documented in the data sheet yet, but the + * manufacturer recommends it) + */ + udelay(10000); + /* wait until EEPROM write access is finished */ + wait_eebusy(100); + set_eere_bit(1); + } +#endif }