X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fserial%2Farm_dcc.c;h=07981e18ee4991cfdbdcb93036ef996909b7791d;hb=4bafceff0e9e5a36908031e41c69a6b37e82da58;hp=7c7fa34c5e09bb22e5407793497313d30c08f422;hpb=66e8f9da6879fe37f3159b3997bff874842dc51d;p=u-boot

diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c
index 7c7fa34c5e..07981e18ee 100644
--- a/drivers/serial/arm_dcc.c
+++ b/drivers/serial/arm_dcc.c
@@ -1,19 +1,9 @@
 /*
  * Copyright (C) 2004-2007 ARM Limited.
  * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ * Copyright (C) 2015 - 2016 Xilinx, Inc, Michal Simek
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License version 2
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ * SPDX-License-Identifier:	GPL-2.0
  *
  * As a special exception, if other files instantiate templates or use macros
  * or inline functions from this file, or you compile this file and link it
@@ -27,11 +17,12 @@
  */
 
 #include <common.h>
-#include <devices.h>
+#include <dm.h>
+#include <serial.h>
 
-#if defined(CONFIG_CPU_V6)
+#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7)
 /*
- * ARMV6
+ * ARMV6 & ARMV7
  */
 #define DCC_RBIT	(1 << 30)
 #define DCC_WBIT	(1 << 29)
@@ -45,6 +36,38 @@
 #define status_dcc(x)	\
 		__asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x))
 
+#elif defined(CONFIG_CPU_XSCALE)
+/*
+ * XSCALE
+ */
+#define DCC_RBIT	(1 << 31)
+#define DCC_WBIT	(1 << 28)
+
+#define write_dcc(x)	\
+		__asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x))
+
+#define read_dcc(x)	\
+		__asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x))
+
+#define status_dcc(x)	\
+		__asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x))
+
+#elif defined(CONFIG_CPU_ARMV8)
+/*
+ * ARMV8
+ */
+#define DCC_RBIT	(1 << 30)
+#define DCC_WBIT	(1 << 29)
+
+#define write_dcc(x)   \
+		__asm__ volatile ("msr dbgdtrtx_el0, %0\n" : : "r" (x))
+
+#define read_dcc(x)    \
+		__asm__ volatile ("mrs %0, dbgdtrrx_el0\n" : "=r" (x))
+
+#define status_dcc(x)  \
+		__asm__ volatile ("mrs %0, mdccsr_el0\n" : "=r" (x))
+
 #else
 #define DCC_RBIT	(1 << 0)
 #define DCC_WBIT	(1 << 1)
@@ -73,21 +96,7 @@
 
 #define TIMEOUT_COUNT 0x4000000
 
-#ifndef CONFIG_ARM_DCC_MULTI
-#define arm_dcc_init serial_init
-void serial_setbrg(void) {}
-#define arm_dcc_getc serial_getc
-#define arm_dcc_putc serial_putc
-#define arm_dcc_puts serial_puts
-#define arm_dcc_tstc serial_tstc
-#endif
-
-int arm_dcc_init(void)
-{
-	return 0;
-}
-
-int arm_dcc_getc(void)
+static int arm_dcc_getc(struct udevice *dev)
 {
 	int ch;
 	register unsigned int reg;
@@ -100,7 +109,7 @@ int arm_dcc_getc(void)
 	return ch;
 }
 
-void arm_dcc_putc(char ch)
+static int arm_dcc_putc(struct udevice *dev, char ch)
 {
 	register unsigned int reg;
 	unsigned int timeout_count = TIMEOUT_COUNT;
@@ -111,44 +120,57 @@ void arm_dcc_putc(char ch)
 			break;
 	}
 	if (timeout_count == 0)
-		return;
+		return -EAGAIN;
 	else
 		write_dcc(ch);
-}
 
-void arm_dcc_puts(const char *s)
-{
-	while (*s)
-		arm_dcc_putc(*s++);
+	return 0;
 }
 
-int arm_dcc_tstc(void)
+static int arm_dcc_pending(struct udevice *dev, bool input)
 {
 	register unsigned int reg;
 
-	can_read_dcc(reg);
+	if (input) {
+		can_read_dcc(reg);
+	} else {
+		can_write_dcc(reg);
+	}
 
 	return reg;
 }
 
-#ifdef CONFIG_ARM_DCC_MULTI
-static device_t arm_dcc_dev;
+static const struct dm_serial_ops arm_dcc_ops = {
+	.putc = arm_dcc_putc,
+	.pending = arm_dcc_pending,
+	.getc = arm_dcc_getc,
+};
 
-int drv_arm_dcc_init(void)
-{
-	int rc;
+static const struct udevice_id arm_dcc_ids[] = {
+	{ .compatible = "arm,dcc", },
+	{ }
+};
 
-	/* Device initialization */
-	memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev));
+U_BOOT_DRIVER(serial_dcc) = {
+	.name	= "arm_dcc",
+	.id	= UCLASS_SERIAL,
+	.of_match = arm_dcc_ids,
+	.ops	= &arm_dcc_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
 
-	strcpy(arm_dcc_dev.name, "dcc");
-	arm_dcc_dev.ext = 0;	/* No extensions */
-	arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT;
-	arm_dcc_dev.tstc = arm_dcc_tstc;	/* 'tstc' function */
-	arm_dcc_dev.getc = arm_dcc_getc;	/* 'getc' function */
-	arm_dcc_dev.putc = arm_dcc_putc;	/* 'putc' function */
-	arm_dcc_dev.puts = arm_dcc_puts;	/* 'puts' function */
+#ifdef CONFIG_DEBUG_UART_ARM_DCC
 
-	return device_register(&arm_dcc_dev);
+#include <debug_uart.h>
+
+static inline void _debug_uart_init(void)
+{
 }
+
+static inline void _debug_uart_putc(int ch)
+{
+	arm_dcc_putc(NULL, ch);
+}
+
+DEBUG_UART_FUNCS
 #endif