X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fserial%2Farm_dcc.c;h=5dfb02f47045a173ea83816893e7474881d5d5d9;hb=36d68668e33191d55b2a23c9f0ec0c1ffecd6897;hp=5a7fb6bc00381afa2bfdf7f8198ecd64999c7a33;hpb=cea221116aa305dbf43625513a1210b89116262b;p=u-boot diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index 5a7fb6bc00..5dfb02f470 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -27,200 +27,132 @@ */ #include -#include - -#define DCC_ARM9_RBIT (1 << 0) -#define DCC_ARM9_WBIT (1 << 1) -#define DCC_ARM11_RBIT (1 << 30) -#define DCC_ARM11_WBIT (1 << 29) - -#define read_core_id(x) do { \ - __asm__ ("mrc p15, 0, %0, c0, c0, 0\n" : "=r" (x)); \ - x = (x >> 4) & 0xFFF; \ - } while (0); +#include +#if defined(CONFIG_CPU_V6) /* - * ARM9 + * ARMV6 */ -#define write_arm9_dcc(x) \ - __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) - -#define read_arm9_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) +#define DCC_RBIT (1 << 30) +#define DCC_WBIT (1 << 29) -#define status_arm9_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) -#define can_read_arm9_dcc(x) do { \ - status_arm9_dcc(x); \ - x &= DCC_ARM9_RBIT; \ - } while (0); +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) -#define can_write_arm9_dcc(x) do { \ - status_arm9_dcc(x); \ - x &= DCC_ARM9_WBIT; \ - x = (x == 0); \ - } while (0); +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) +#elif defined(CONFIG_CPU_XSCALE) /* - * ARM11 + * XSCALE */ -#define write_arm11_dcc(x) \ - __asm__ volatile ("mcr p14, 0, %0, c0, c5, 0\n" : : "r" (x)) +#define DCC_RBIT (1 << 31) +#define DCC_WBIT (1 << 28) -#define read_arm11_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c5, 0\n" : "=r" (x)) +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c8, c0, 0\n" : : "r" (x)) -#define status_arm11_dcc(x) \ - __asm__ volatile ("mrc p14, 0, %0, c0, c1, 0\n" : "=r" (x)) +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c9, c0, 0\n" : "=r" (x)) -#define can_read_arm11_dcc(x) do { \ - status_arm11_dcc(x); \ - x &= DCC_ARM11_RBIT; \ - } while (0); +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c14, c0, 0\n" : "=r" (x)) -#define can_write_arm11_dcc(x) do { \ - status_arm11_dcc(x); \ - x &= DCC_ARM11_WBIT; \ - x = (x == 0); \ - } while (0); +#else +#define DCC_RBIT (1 << 0) +#define DCC_WBIT (1 << 1) -#define TIMEOUT_COUNT 0x4000000 +#define write_dcc(x) \ + __asm__ volatile ("mcr p14, 0, %0, c1, c0, 0\n" : : "r" (x)) + +#define read_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c1, c0, 0\n" : "=r" (x)) + +#define status_dcc(x) \ + __asm__ volatile ("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (x)) -static enum { - arm9_and_earlier, - arm11_and_later -} arm_type = arm9_and_earlier; - -#ifndef CONFIG_ARM_DCC_MULTI -#define arm_dcc_init serial_init -void serial_setbrg(void) {} -#define arm_dcc_getc serial_getc -#define arm_dcc_putc serial_putc -#define arm_dcc_puts serial_puts -#define arm_dcc_tstc serial_tstc #endif -int arm_dcc_init(void) -{ - register unsigned int id; +#define can_read_dcc(x) do { \ + status_dcc(x); \ + x &= DCC_RBIT; \ + } while (0); - read_core_id(id); +#define can_write_dcc(x) do { \ + status_dcc(x); \ + x &= DCC_WBIT; \ + x = (x == 0); \ + } while (0); - if (id >= 0xb00) - arm_type = arm11_and_later; - else - arm_type = arm9_and_earlier; +#define TIMEOUT_COUNT 0x4000000 +static int arm_dcc_init(void) +{ return 0; } -int arm_dcc_getc(void) +static int arm_dcc_getc(void) { int ch; register unsigned int reg; - switch (arm_type) { - case arm11_and_later: - do { - can_read_arm11_dcc(reg); - } while (!reg); - read_arm11_dcc(ch); - break; - - case arm9_and_earlier: - default: - do { - can_read_arm9_dcc(reg); - } while (!reg); - read_arm9_dcc(ch); - break; - } + do { + can_read_dcc(reg); + } while (!reg); + read_dcc(ch); return ch; } -void arm_dcc_putc(char ch) +static void arm_dcc_putc(char ch) { register unsigned int reg; unsigned int timeout_count = TIMEOUT_COUNT; - switch (arm_type) { - case arm11_and_later: - while (--timeout_count) { - can_write_arm11_dcc(reg); - if (reg) - break; - } - if (timeout_count == 0) - return; - else - write_arm11_dcc(ch); - break; - - case arm9_and_earlier: - default: - while (--timeout_count) { - can_write_arm9_dcc(reg); - if (reg) - break; - } - if (timeout_count == 0) - return; - else - write_arm9_dcc(ch); - break; + while (--timeout_count) { + can_write_dcc(reg); + if (reg) + break; } + if (timeout_count == 0) + return; + else + write_dcc(ch); } -void arm_dcc_puts(const char *s) -{ - while (*s) - arm_dcc_putc(*s++); -} - -int arm_dcc_tstc(void) +static int arm_dcc_tstc(void) { register unsigned int reg; - switch (arm_type) { - case arm11_and_later: - can_read_arm11_dcc(reg); - break; - case arm9_and_earlier: - default: - can_read_arm9_dcc(reg); - break; - } + can_read_dcc(reg); return reg; } -#ifdef CONFIG_ARM_DCC_MULTI -static device_t arm_dcc_dev; - -int drv_arm_dcc_init(void) +static void arm_dcc_setbrg(void) { - int rc; - - /* Device initialization */ - memset(&arm_dcc_dev, 0, sizeof(arm_dcc_dev)); - - strcpy(arm_dcc_dev.name, "dcc"); - arm_dcc_dev.ext = 0; /* No extensions */ - arm_dcc_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_OUTPUT; - arm_dcc_dev.tstc = arm_dcc_tstc; /* 'tstc' function */ - arm_dcc_dev.getc = arm_dcc_getc; /* 'getc' function */ - arm_dcc_dev.putc = arm_dcc_putc; /* 'putc' function */ - arm_dcc_dev.puts = arm_dcc_puts; /* 'puts' function */ - - rc = device_register(&arm_dcc_dev); +} - if (rc == 0) { - arm_dcc_init(); - return 1; - } +static struct serial_device arm_dcc_drv = { + .name = "arm_dcc", + .start = arm_dcc_init, + .stop = NULL, + .setbrg = arm_dcc_setbrg, + .putc = arm_dcc_putc, + .puts = default_serial_puts, + .getc = arm_dcc_getc, + .tstc = arm_dcc_tstc, +}; + +void arm_dcc_initialize(void) +{ + serial_register(&arm_dcc_drv); +} - return 0; +__weak struct serial_device *default_serial_console(void) +{ + return &arm_dcc_drv; } -#endif