X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fserial%2Fserial_pl01x.c;h=dfb610e1a9d553429d1462335a6550f6d31afe04;hb=4535a24c0c06e367bc40c43b4807bdb335513a1a;hp=ed581ae22bf11113d2ae080f4aabad3210fe2165;hpb=96baa4c37695b4dac2bde981f59c38e7af19f2eb;p=u-boot diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c index ed581ae22b..dfb610e1a9 100644 --- a/drivers/serial/serial_pl01x.c +++ b/drivers/serial/serial_pl01x.c @@ -6,23 +6,7 @@ * ARM Ltd. * Philippe Robin, * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */ @@ -30,6 +14,8 @@ #include #include #include +#include +#include #include "serial_pl01x.h" /* @@ -54,7 +40,7 @@ static struct pl01x_regs *pl01x_get_regs(int portnum) #ifdef CONFIG_PL010_SERIAL -int serial_init (void) +static int pl01x_serial_init(void) { struct pl01x_regs *regs = pl01x_get_regs(CONSOLE_PORT); unsigned int divisor; @@ -104,7 +90,7 @@ int serial_init (void) #ifdef CONFIG_PL011_SERIAL -int serial_init (void) +static int pl01x_serial_init(void) { struct pl01x_regs *regs = pl01x_get_regs(CONSOLE_PORT); unsigned int temp; @@ -156,18 +142,20 @@ int serial_init (void) writel(lcr, ®s->fr); writel(lcr, ®s->pl011_rlcr); + /* lcrh needs to be set again for change to be effective */ + writel(lcr, ®s->pl011_lcrh); } #endif /* Finally, enable the UART */ - writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE, - ®s->pl011_cr); + writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE | + UART_PL011_CR_RTS, ®s->pl011_cr); return 0; } #endif /* CONFIG_PL011_SERIAL */ -void serial_putc (const char c) +static void pl01x_serial_putc(const char c) { if (c == '\n') pl01x_putc (CONSOLE_PORT, '\r'); @@ -175,24 +163,17 @@ void serial_putc (const char c) pl01x_putc (CONSOLE_PORT, c); } -void serial_puts (const char *s) -{ - while (*s) { - serial_putc (*s++); - } -} - -int serial_getc (void) +static int pl01x_serial_getc(void) { return pl01x_getc (CONSOLE_PORT); } -int serial_tstc (void) +static int pl01x_serial_tstc(void) { return pl01x_tstc (CONSOLE_PORT); } -void serial_setbrg (void) +static void pl01x_serial_setbrg(void) { struct pl01x_regs *regs = pl01x_get_regs(CONSOLE_PORT); @@ -248,3 +229,24 @@ static int pl01x_tstc (int portnum) WATCHDOG_RESET(); return !(readl(®s->fr) & UART_PL01x_FR_RXFE); } + +static struct serial_device pl01x_serial_drv = { + .name = "pl01x_serial", + .start = pl01x_serial_init, + .stop = NULL, + .setbrg = pl01x_serial_setbrg, + .putc = pl01x_serial_putc, + .puts = default_serial_puts, + .getc = pl01x_serial_getc, + .tstc = pl01x_serial_tstc, +}; + +void pl01x_serial_initialize(void) +{ + serial_register(&pl01x_serial_drv); +} + +__weak struct serial_device *default_serial_console(void) +{ + return &pl01x_serial_drv; +}