X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fserial%2Fserial_sh.h;h=941e6eda4c1f05bb40155236d60166d74101abf1;hb=e113fe3c06e34c9d29bd8952955558d585e4f80c;hp=528aa7351d274692d6011a9f1ddd73f99b7d8493;hpb=95776391852147ea5c2e8ac01613a20c6583bc33;p=u-boot

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 528aa7351d..941e6eda4c 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -227,7 +227,8 @@ struct uart_port {
 #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
 	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
 # define SCIF_ORER	0x0001
-# define SCSCR_INIT(port)	0x32	/* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
+# define SCSCR_INIT(port)	(port->clk_mode == EXT_CLK ? 0x32 : 0x30)
+				/* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */
 #else
 # error CPU subtype not defined
 #endif
@@ -742,7 +743,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
 #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \
 	defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794)
 #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */
-#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) /* Internal Clock */
+#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */
 #else /* Generic SH */
 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1)
 #endif