X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fserial%2Fserial_xuartlite.c;h=988438e75471a37f2643328c910ff13b0fe753e5;hb=c292adae170fa8c27dca75963bdb0a9afc640e57;hp=00d0eaac753ed19678fb812a99fc4c1a258c2809;hpb=ce0eb70333331da6942167c41e6841c8c7994a33;p=u-boot diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c index 00d0eaac75..988438e754 100644 --- a/drivers/serial/serial_xuartlite.c +++ b/drivers/serial/serial_xuartlite.c @@ -1,77 +1,162 @@ /* - * (C) Copyright 2008 Michal Simek + * (C) Copyright 2008-2011 Michal Simek * Clean driver and add xilinx constant from header file * * (C) Copyright 2004 Atmark Techno, Inc. * Yasushi SHOJI * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ #include +#include #include - -#define RX_FIFO_OFFSET 0 /* receive FIFO, read only */ -#define TX_FIFO_OFFSET 4 /* transmit FIFO, write only */ -#define STATUS_REG_OFFSET 8 /* status register, read only */ +#include +#include #define SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */ #define SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */ #define SR_RX_FIFO_FULL 0x02 /* receive FIFO full */ -#define UARTLITE_STATUS (CONFIG_SERIAL_BASE + STATUS_REG_OFFSET) -#define UARTLITE_TX_FIFO (CONFIG_SERIAL_BASE + TX_FIFO_OFFSET) -#define UARTLITE_RX_FIFO (CONFIG_SERIAL_BASE + RX_FIFO_OFFSET) +#define ULITE_CONTROL_RST_TX 0x01 +#define ULITE_CONTROL_RST_RX 0x02 + +struct uartlite { + unsigned int rx_fifo; + unsigned int tx_fifo; + unsigned int status; + unsigned int control; +}; + +static struct uartlite *userial_ports[4] = { +#ifdef XILINX_UARTLITE_BASEADDR + [0] = (struct uartlite *)XILINX_UARTLITE_BASEADDR, +#endif +#ifdef XILINX_UARTLITE_BASEADDR1 + [1] = (struct uartlite *)XILINX_UARTLITE_BASEADDR1, +#endif +#ifdef XILINX_UARTLITE_BASEADDR2 + [2] = (struct uartlite *)XILINX_UARTLITE_BASEADDR2, +#endif +#ifdef XILINX_UARTLITE_BASEADDR3 + [3] = (struct uartlite *)XILINX_UARTLITE_BASEADDR3 +#endif +}; -int serial_init(void) +static void uartlite_serial_putc(const char c, const int port) { - /* FIXME: Nothing for now. We should initialize fifo, etc */ - return 0; + struct uartlite *regs = userial_ports[port]; + + if (c == '\n') + uartlite_serial_putc('\r', port); + + while (in_be32(®s->status) & SR_TX_FIFO_FULL) + ; + out_be32(®s->tx_fifo, c & 0xff); } -void serial_setbrg(void) +static void uartlite_serial_puts(const char *s, const int port) { - /* FIXME: what's this for? */ + while (*s) + uartlite_serial_putc(*s++, port); } -void serial_putc(const char c) +static int uartlite_serial_getc(const int port) { - if (c == '\n') - serial_putc('\r'); - while (in_be32((u32 *) UARTLITE_STATUS) & SR_TX_FIFO_FULL); - out_be32((u32 *) UARTLITE_TX_FIFO, (unsigned char) (c & 0xff)); + struct uartlite *regs = userial_ports[port]; + + while (!(in_be32(®s->status) & SR_RX_FIFO_VALID_DATA)) + ; + return in_be32(®s->rx_fifo) & 0xff; } -void serial_puts(const char * s) +static int uartlite_serial_tstc(const int port) { - while (*s) { - serial_putc(*s++); + struct uartlite *regs = userial_ports[port]; + + return in_be32(®s->status) & SR_RX_FIFO_VALID_DATA; +} + +static int uartlite_serial_init(const int port) +{ + struct uartlite *regs = userial_ports[port]; + + if (regs) { + out_be32(®s->control, 0); + out_be32(®s->control, + ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX); + in_be32(®s->control); + return 0; } + + return -1; } -int serial_getc(void) +/* Multi serial device functions */ +#define DECLARE_ESERIAL_FUNCTIONS(port) \ + static int userial##port##_init(void) \ + { return uartlite_serial_init(port); } \ + static void userial##port##_setbrg(void) {} \ + static int userial##port##_getc(void) \ + { return uartlite_serial_getc(port); } \ + static int userial##port##_tstc(void) \ + { return uartlite_serial_tstc(port); } \ + static void userial##port##_putc(const char c) \ + { uartlite_serial_putc(c, port); } \ + static void userial##port##_puts(const char *s) \ + { uartlite_serial_puts(s, port); } + +/* Serial device descriptor */ +#define INIT_ESERIAL_STRUCTURE(port, __name) { \ + .name = __name, \ + .start = userial##port##_init, \ + .stop = NULL, \ + .setbrg = userial##port##_setbrg, \ + .getc = userial##port##_getc, \ + .tstc = userial##port##_tstc, \ + .putc = userial##port##_putc, \ + .puts = userial##port##_puts, \ +} + +DECLARE_ESERIAL_FUNCTIONS(0); +struct serial_device uartlite_serial0_device = + INIT_ESERIAL_STRUCTURE(0, "ttyUL0"); +DECLARE_ESERIAL_FUNCTIONS(1); +struct serial_device uartlite_serial1_device = + INIT_ESERIAL_STRUCTURE(1, "ttyUL1"); +DECLARE_ESERIAL_FUNCTIONS(2); +struct serial_device uartlite_serial2_device = + INIT_ESERIAL_STRUCTURE(2, "ttyUL2"); +DECLARE_ESERIAL_FUNCTIONS(3); +struct serial_device uartlite_serial3_device = + INIT_ESERIAL_STRUCTURE(3, "ttyUL3"); + +__weak struct serial_device *default_serial_console(void) { - while (!(in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA)); - return in_be32((u32 *) UARTLITE_RX_FIFO) & 0xff; + if (userial_ports[0]) + return &uartlite_serial0_device; + if (userial_ports[1]) + return &uartlite_serial1_device; + if (userial_ports[2]) + return &uartlite_serial2_device; + if (userial_ports[3]) + return &uartlite_serial3_device; + + return NULL; } -int serial_tstc(void) +void uartlite_serial_initialize(void) { - return (in_be32((u32 *) UARTLITE_STATUS) & SR_RX_FIFO_VALID_DATA); +#ifdef XILINX_UARTLITE_BASEADDR + serial_register(&uartlite_serial0_device); +#endif /* XILINX_UARTLITE_BASEADDR */ +#ifdef XILINX_UARTLITE_BASEADDR1 + serial_register(&uartlite_serial1_device); +#endif /* XILINX_UARTLITE_BASEADDR1 */ +#ifdef XILINX_UARTLITE_BASEADDR2 + serial_register(&uartlite_serial2_device); +#endif /* XILINX_UARTLITE_BASEADDR2 */ +#ifdef XILINX_UARTLITE_BASEADDR3 + serial_register(&uartlite_serial3_device); +#endif /* XILINX_UARTLITE_BASEADDR3 */ }