X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fsmc91111.h;h=0b6dfeb0d4b210c1e621aa1d3e1bc1e42847b865;hb=983fda8391fa0ccfd4e0fd0bfb5a5e662e07b222;hp=fc694ac725238e9987036b020d2b3494f78df105;hpb=a3ad8e26a4ac96838b2963cb462770c70c9f6443;p=u-boot

diff --git a/drivers/smc91111.h b/drivers/smc91111.h
index fc694ac725..0b6dfeb0d4 100644
--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -76,6 +76,16 @@ typedef unsigned long int 		dword;
 
 #ifdef CONFIG_PXA250
 
+#ifdef CONFIG_XSENGINE
+#define	SMC_inl(r) 	(*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
+#define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))))
+#define SMC_inb(p)	({ \
+	unsigned int __p = (unsigned int)(SMC_BASE_ADDRESS + (p<<1)); \
+	unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \
+	if (__p & 2) __v >>= 8; \
+	else __v &= 0xff; \
+	__v; })
+#else
 #define	SMC_inl(r) 	(*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
 #define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+(r))))
 #define SMC_inb(p)	({ \
@@ -84,9 +94,16 @@ typedef unsigned long int 		dword;
 	if (__p & 1) __v >>= 8; \
 	else __v &= 0xff; \
 	__v; })
+#endif
 
+#ifdef CONFIG_XSENGINE
+#define	SMC_outl(d,r)	(*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
+#define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+(r<<1))) = d)
+#else
 #define	SMC_outl(d,r)	(*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
 #define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
+#endif
+
 #define	SMC_outb(d,r)	({	word __d = (byte)(d);  \
 				word __w = SMC_inw((r)&~1);  \
 				__w &= ((r)&1) ? 0x00FF : 0xFF00;  \
@@ -139,14 +156,23 @@ typedef unsigned long int 		dword;
 
 #else /* if not CONFIG_PXA250 */
 
+#ifndef CONFIG_SMC_USE_IOFUNCS /* these macros don't work on some boards */
 /*
  * We have only 16 Bit PCMCIA access on Socket 0
  */
 
+#ifdef CONFIG_ADNPESC1
+#define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))))
+#else
 #define	SMC_inw(r) 	(*((volatile word *)(SMC_BASE_ADDRESS+(r))))
+#endif
 #define  SMC_inb(r)	(((r)&1) ? SMC_inw((r)&~1)>>8 : SMC_inw(r)&0xFF)
 
+#ifdef CONFIG_ADNPESC1
+#define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+((r)<<1))) = d)
+#else
 #define	SMC_outw(d,r)	(*((volatile word *)(SMC_BASE_ADDRESS+(r))) = d)
+#endif
 #define	SMC_outb(d,r)	({	word __d = (byte)(d);  \
 				word __w = SMC_inw((r)&~1);  \
 				__w &= ((r)&1) ? 0x00FF : 0xFF00;  \
@@ -178,9 +204,15 @@ typedef unsigned long int 		dword;
 				})
 #endif
 
+#endif  /* CONFIG_SMC_USE_IOFUNCS */
+
 #if defined(CONFIG_SMC_USE_32_BIT)
 
+#ifdef CONFIG_XSENGINE
+#define	SMC_inl(r) 	(*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))))
+#else
 #define	SMC_inl(r) 	(*((volatile dword *)(SMC_BASE_ADDRESS+(r))))
+#endif
 
 #define SMC_insl(r,b,l) 	({	int __i ;  \
 					dword *__b2;  \
@@ -191,8 +223,11 @@ typedef unsigned long int 		dword;
 					};  \
 				})
 
+#ifdef CONFIG_XSENGINE
+#define	SMC_outl(d,r)	(*((volatile dword *)(SMC_BASE_ADDRESS+(r<<1))) = d)
+#else
 #define	SMC_outl(d,r)	(*((volatile dword *)(SMC_BASE_ADDRESS+(r))) = d)
-
+#endif
 #define SMC_outsl(r,b,l)	({	int __i; \
 					dword *__b2; \
 					__b2 = (dword *) b; \
@@ -306,7 +341,22 @@ typedef unsigned long int 		dword;
 #define RPC_LED_100	(0x05)	/* LED = 100Mbps link dectect */
 #define RPC_LED_TX	(0x06)	/* LED = TX packet occurred */
 #define RPC_LED_RX	(0x07)	/* LED = RX packet occurred */
-#define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
+#if defined(CONFIG_DK1C20) || defined(CONFIG_DK1S10)
+/* buggy schematic: LEDa -> yellow, LEDb --> green */
+#define RPC_DEFAULT	( RPC_SPEED | RPC_DPLX | RPC_ANEG	\
+			| (RPC_LED_TX_RX << RPC_LSXA_SHFT)	\
+			| (RPC_LED_100_10 << RPC_LSXB_SHFT)	)
+#elif defined(CONFIG_ADNPESC1)
+/* SSV ADNP/ESC1 has only one LED: LEDa -> Rx/Tx indicator */
+#define RPC_DEFAULT	( RPC_SPEED | RPC_DPLX | RPC_ANEG	\
+			| (RPC_LED_TX_RX << RPC_LSXA_SHFT)	\
+			| (RPC_LED_100_10 << RPC_LSXB_SHFT)	)
+#else
+/* SMSC reference design: LEDa --> green, LEDb --> yellow */
+#define RPC_DEFAULT	( RPC_SPEED | RPC_DPLX | RPC_ANEG	\
+			| (RPC_LED_100_10 << RPC_LSXA_SHFT)	\
+			| (RPC_LED_TX_RX << RPC_LSXB_SHFT)	)
+#endif
 
 /* Bank 0 0x000C is reserved */
 
@@ -355,7 +405,7 @@ typedef unsigned long int 		dword;
 #define	CTL_EEPROM_SELECT 0x0004 /* Controls EEPROM reload & store */
 #define	CTL_RELOAD	0x0002 /* When set reads EEPROM into registers */
 #define	CTL_STORE	0x0001 /* When set stores registers into EEPROM */
-#define CTL_DEFAULT     (0x1210)
+#define CTL_DEFAULT     (0x1A10) /* Autorelease enabled*/
 
 /* MMU Command Register */
 /* BANK 2 */
@@ -400,6 +450,7 @@ typedef unsigned long int 		dword;
 #define	PTR_RCV		0x8000 /* 1=Receive area, 0=Transmit area */
 #define	PTR_AUTOINC 	0x4000 /* Auto increment the pointer on each access */
 #define PTR_READ	0x2000 /* When 1 the operation is a read */
+#define PTR_NOTEMPTY	0x0800 /* When 1 _do not_ write fifo DATA REG */
 
 
 /* Data Register */