X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fspi%2Frk_spi.c;h=105ee4a3ba59882c29f353c137316a5e027d1539;hb=4096f350d5218830ffedc56631e4382df478a370;hp=9eff423acd12ad77f05c7e02d214b707b4bb672e;hpb=82d72a1b9967cff4908f22c57536c3660f794401;p=u-boot diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index 9eff423acd..105ee4a3ba 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include @@ -35,8 +35,7 @@ struct rockchip_spi_platdata { struct rockchip_spi_priv { struct rockchip_spi *regs; - struct udevice *clk; - int clk_id; + struct clk clk; unsigned int max_freq; unsigned int mode; ulong last_transaction_us; /* Time of last transaction end */ @@ -144,7 +143,6 @@ static int rockchip_spi_ofdata_to_platdata(struct udevice *bus) bus->name, ret); return ret; } - priv->clk_id = ret; plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 50000000); @@ -175,7 +173,7 @@ static int rockchip_spi_probe(struct udevice *bus) * Use 99 MHz as our clock since it divides nicely into 594 MHz which * is the assumed speed for CLK_GENERAL. */ - ret = clk_set_periph_rate(priv->clk, priv->clk_id, 99000000); + ret = clk_set_rate(&priv->clk, 99000000); if (ret < 0) { debug("%s: Failed to set clock: %d\n", __func__, ret); return ret;