X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fspi%2Ftegra20_sflash.c;h=e70210d7abf86949e8942132caaef3eaae3be7a1;hb=e203dcf23e9eabc2e4f3d0b079457cd1516f2081;hp=5dc196b0d10f662a5c5d034ea040dc3571b9df22;hpb=f692248f9039fb9d933ccb5e919ecfa073b5a130;p=u-boot

diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 5dc196b0d1..e70210d7ab 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SPI_CMD_CS1_EN			BIT(6)
 #define SPI_CMD_CS0_EN			BIT(5)
 #define SPI_CMD_BIT_LENGTH		BIT(4)
-#define SPI_CMD_BIT_LENGTH_MASK		0x0000001F
+#define SPI_CMD_BIT_LENGTH_MASK		GENMASK(4, 0)
 
 #define SPI_STAT_BSY			BIT(31)
 #define SPI_STAT_RDY			BIT(30)
@@ -88,10 +88,10 @@ static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus)
 {
 	struct tegra_spi_platdata *plat = bus->platdata;
 	const void *blob = gd->fdt_blob;
-	int node = bus->of_offset;
+	int node = dev_of_offset(bus);
 
-	plat->base = dev_get_addr(bus);
-	plat->periph_id = clock_decode_periph_id(blob, node);
+	plat->base = devfdt_get_addr(bus);
+	plat->periph_id = clock_decode_periph_id(bus);
 
 	if (plat->periph_id == PERIPH_ID_NONE) {
 		debug("%s: could not decode periph id %d\n", __func__,
@@ -122,6 +122,10 @@ static int tegra20_sflash_probe(struct udevice *bus)
 	priv->freq = plat->frequency;
 	priv->periph_id = plat->periph_id;
 
+	/* Change SPI clock to correct frequency, PLLP_OUT0 source */
+	clock_start_periph_pll(priv->periph_id, CLOCK_ID_PERIPH,
+			       priv->freq);
+
 	return 0;
 }