X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Ftsec.c;h=2524e4f6d2b6644a3ec69cb7324f16d37b202e4c;hb=e0b369e4f71b11dd5716903dd6258028cf07e6e8;hp=30dca11522d6fc203528bc30b923e5c24137610e;hpb=daaba9859b0b94571dc3e45ad0c26e136426b351;p=u-boot

diff --git a/drivers/tsec.c b/drivers/tsec.c
index 30dca11522..2524e4f6d2 100644
--- a/drivers/tsec.c
+++ b/drivers/tsec.c
@@ -12,8 +12,6 @@
  */
 
 #include <config.h>
-#include <mpc85xx.h>
-#include <mpc86xx.h>
 #include <common.h>
 #include <malloc.h>
 #include <net.h>
@@ -315,7 +313,8 @@ static int init_phy(struct eth_device *dev)
 	 * PHY */
 	curphy = get_phy_info(dev);
 
-	if (NULL == curphy) {
+	if (curphy == NULL) {
+		priv->phyinfo = NULL;
 		printf("%s: No PHY found\n", dev->name);
 
 		return 0;
@@ -611,11 +610,10 @@ static void adjust_link(struct eth_device *dev)
 			regs->maccfg2 = ((regs->maccfg2 & ~(MACCFG2_IF))
 					 | MACCFG2_MII);
 
-			/* If We're in reduced mode, we need
-			 * to say whether we're 10 or 100 MB.
+			/* Set R100 bit in all modes although
+			 * it is only used in RGMII mode
 			 */
-			if ((priv->speed == 100)
-			    && (priv->flags & TSEC_REDUCED))
+			if (priv->speed == 100)
 				regs->ecntrl |= ECNTRL_R100;
 			else
 				regs->ecntrl &= ~(ECNTRL_R100);
@@ -663,7 +661,8 @@ static void startup_tsec(struct eth_device *dev)
 	rtx.txbd[TX_BUF_CNT - 1].status |= TXBD_WRAP;
 
 	/* Start up the PHY */
-	phy_run_commands(priv, priv->phyinfo->startup);
+	if(priv->phyinfo)
+		phy_run_commands(priv, priv->phyinfo->startup);
 	adjust_link(dev);
 
 	/* Enable Transmit and Receive */
@@ -767,7 +766,8 @@ static void tsec_halt(struct eth_device *dev)
 	regs->maccfg1 &= ~(MACCFG1_TX_EN | MACCFG1_RX_EN);
 
 	/* Shut down the PHY, as needed */
-	phy_run_commands(priv, priv->phyinfo->shutdown);
+	if(priv->phyinfo)
+		phy_run_commands(priv, priv->phyinfo->shutdown);
 }
 
 struct phy_info phy_info_M88E1011S = {
@@ -815,6 +815,7 @@ struct phy_info phy_info_M88E1111S = {
 			   {0x1d, 0x5, NULL},
 			   {0x1e, 0x0, NULL},
 			   {0x1e, 0x100, NULL},
+			   {0x14, 0x0cd2, NULL}, /* Delay RGMII TX and RX */
 			   {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
 			   {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
 			   {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
@@ -838,7 +839,6 @@ struct phy_info phy_info_M88E1111S = {
 
 static unsigned int m88e1145_setmode(uint mii_reg, struct tsec_private *priv)
 {
-	unsigned int temp;
 	uint mii_data = read_phy_reg(priv, mii_reg);
 
 	/* Setting MIIM_88E1145_PHY_EXT_CR */
@@ -1110,10 +1110,8 @@ struct phy_info phy_info_dp83865 = {
 };
 
 struct phy_info *phy_info[] = {
-#if 0
-	&phy_info_cis8201,
-#endif
 	&phy_info_cis8204,
+	&phy_info_cis8201,
 	&phy_info_M88E1011S,
 	&phy_info_M88E1111S,
 	&phy_info_M88E1145,