X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fgadget%2Fci_udc.h;h=346164a641329981b6c187dbdf44d609f36208cf;hb=72a38e06a20129209eaa0e5211cbf50b192de688;hp=42f6ef4ab30aa8e777a7af4ae49bd56e61697924;hpb=a87a0ce7028d5371c81d77ba72c1ba43a1ca77bc;p=u-boot diff --git a/drivers/usb/gadget/ci_udc.h b/drivers/usb/gadget/ci_udc.h index 42f6ef4ab3..346164a641 100644 --- a/drivers/usb/gadget/ci_udc.h +++ b/drivers/usb/gadget/ci_udc.h @@ -8,63 +8,100 @@ #define NUM_ENDPOINTS 6 +#ifdef CONFIG_CI_UDC_HAS_HOSTPC +struct ci_udc { + u32 usbcmd; /* 0x130 */ + u32 usbsts; /* 0x134 */ + u32 pad1[3]; + u32 devaddr; /* 0x144 */ + u32 epinitaddr; /* 0x148 */ + u32 pad2[10]; + u32 portsc; /* 0x174 */ + u32 pad178[(0x1b4 - (0x174 + 4)) / 4]; + u32 hostpc1_devlc; /* 0x1b4 */ + u32 pad1b8[(0x1f8 - (0x1b4 + 4)) / 4]; + u32 usbmode; /* 0x1f8 */ + u32 pad1fc[(0x208 - (0x1f8 + 4)) / 4]; + u32 epsetupstat; /* 0x208 */ + u32 epprime; /* 0x20c */ + u32 epflush; /* 0x210 */ + u32 epstat; /* 0x214 */ + u32 epcomp; /* 0x218 */ + u32 epctrl[16]; /* 0x21c */ +}; +#else struct ci_udc { -#define MICRO_8FRAME 0x8 -#define USBCMD_ITC(x) ((((x) > 0xff) ? 0xff : x) << 16) -#define USBCMD_FS2 (1 << 15) -#define USBCMD_RST (1 << 1) -#define USBCMD_RUN (1) u32 usbcmd; /* 0x140 */ -#define STS_SLI (1 << 8) -#define STS_URI (1 << 6) -#define STS_PCI (1 << 2) -#define STS_UEI (1 << 1) -#define STS_UI (1 << 0) u32 usbsts; /* 0x144 */ u32 pad1[3]; u32 devaddr; /* 0x154 */ u32 epinitaddr; /* 0x158 */ u32 pad2[10]; -#define PTS_ENABLE 2 -#define PTS(x) (((x) & 0x3) << 30) -#define PFSC (1 << 24) u32 portsc; /* 0x184 */ u32 pad3[8]; -#define USBMODE_DEVICE 2 u32 usbmode; /* 0x1a8 */ u32 epstat; /* 0x1ac */ -#define EPT_TX(x) (1 << (((x) & 0xffff) + 16)) -#define EPT_RX(x) (1 << ((x) & 0xffff)) u32 epprime; /* 0x1b0 */ u32 epflush; /* 0x1b4 */ u32 pad4; u32 epcomp; /* 0x1bc */ + u32 epctrl[16]; /* 0x1c0 */ +}; + +#define PTS_ENABLE 2 +#define PTS(x) (((x) & 0x3) << 30) +#define PFSC (1 << 24) +#endif + +#define MICRO_8FRAME 0x8 +#define USBCMD_ITC(x) ((((x) > 0xff) ? 0xff : x) << 16) +#define USBCMD_FS2 (1 << 15) +#define USBCMD_RST (1 << 1) +#define USBCMD_RUN (1) + +#define STS_SLI (1 << 8) +#define STS_URI (1 << 6) +#define STS_PCI (1 << 2) +#define STS_UEI (1 << 1) +#define STS_UI (1 << 0) + +#define USBMODE_DEVICE 2 + +#define EPT_TX(x) (1 << (((x) & 0xffff) + 16)) +#define EPT_RX(x) (1 << ((x) & 0xffff)) + #define CTRL_TXE (1 << 23) #define CTRL_TXR (1 << 22) #define CTRL_RXE (1 << 7) #define CTRL_RXR (1 << 6) #define CTRL_TXT_BULK (2 << 18) #define CTRL_RXT_BULK (2 << 2) - u32 epctrl[16]; /* 0x1c0 */ + +struct ci_req { + struct usb_request req; + struct list_head queue; + /* Bounce buffer allocated if needed to align the transfer */ + uint8_t *b_buf; + uint32_t b_len; + /* Buffer for the current transfer. Either req.buf/len or b_buf/len */ + uint8_t *hw_buf; + uint32_t hw_len; }; struct ci_ep { struct usb_ep ep; struct list_head queue; + bool req_primed; const struct usb_endpoint_descriptor *desc; - - struct usb_request req; - uint8_t *b_buf; - uint32_t b_len; - uint8_t b_fast[64] __aligned(ARCH_DMA_MINALIGN); }; struct ci_drv { struct usb_gadget gadget; + struct ci_req *ep0_req; + bool ep0_data_phase; struct usb_gadget_driver *driver; struct ehci_ctrl *ctrl; struct ept_queue_head *epts; - struct ept_queue_item *items[2 * NUM_ENDPOINTS]; uint8_t *items_mem; struct ci_ep ep[NUM_ENDPOINTS]; };