X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fgadget%2Fdwc2_udc_otg.c;h=cb44374e81a615c2c4cccdc7cb526ee5b5444721;hb=87fcdca6be8641d8aa7c4e31ccb6cb7d5177359e;hp=a23278d957a6a184e4d04b184c860afa0a401c66;hpb=6beacfcff81bdc04c10a440971b0fb683ee57534;p=u-boot diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index a23278d957..cb44374e81 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -19,7 +19,7 @@ */ #undef DEBUG #include -#include +#include #include #include @@ -63,13 +63,11 @@ static char *state_names[] = { "WAIT_FOR_NULL_COMPLETE", }; -#define DRIVER_DESC "DWC2 HS USB OTG Device Driver, (c) Samsung Electronics" #define DRIVER_VERSION "15 March 2009" struct dwc2_udc *the_controller; static const char driver_name[] = "dwc2-udc"; -static const char driver_desc[] = DRIVER_DESC; static const char ep0name[] = "ep0-control"; /* Max packet size*/ @@ -403,6 +401,7 @@ static void reconfig_usbd(struct dwc2_udc *dev) int i; unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl); uint32_t dflt_gusbcfg; + uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz; debug("Reseting OTG controller\n"); @@ -467,18 +466,27 @@ static void reconfig_usbd(struct dwc2_udc *dev) /* 10. Unmask device IN EP common interrupts*/ writel(DIEPMSK_INIT, ®->diepmsk); + rx_fifo_sz = RX_FIFO_SIZE; + np_tx_fifo_sz = NPTX_FIFO_SIZE; + tx_fifo_sz = PTX_FIFO_SIZE; + + if (dev->pdata->rx_fifo_sz) + rx_fifo_sz = dev->pdata->rx_fifo_sz; + if (dev->pdata->np_tx_fifo_sz) + np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz; + if (dev->pdata->tx_fifo_sz) + tx_fifo_sz = dev->pdata->tx_fifo_sz; + /* 11. Set Rx FIFO Size (in 32-bit words) */ - writel(RX_FIFO_SIZE >> 2, ®->grxfsiz); + writel(rx_fifo_sz, ®->grxfsiz); /* 12. Set Non Periodic Tx FIFO Size */ - writel((NPTX_FIFO_SIZE >> 2) << 16 | ((RX_FIFO_SIZE >> 2)) << 0, + writel((np_tx_fifo_sz << 16) | rx_fifo_sz, ®->gnptxfsiz); for (i = 1; i < DWC2_MAX_HW_ENDPOINTS; i++) - writel((PTX_FIFO_SIZE >> 2) << 16 | - ((RX_FIFO_SIZE + NPTX_FIFO_SIZE + - PTX_FIFO_SIZE*(i-1)) >> 2) << 0, - ®->dieptxf[i-1]); + writel((rx_fifo_sz + np_tx_fifo_sz + tx_fifo_sz*(i-1)) | + tx_fifo_sz << 16, ®->dieptxf[i-1]); /* Flush the RX FIFO */ writel(RX_FIFO_FLUSH, ®->grstctl);