X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-mxs.c;h=5062af555932dc76e20c9867d9ff73860f47b006;hb=ed0a6fcff92ec14947916291a33167188b4218d8;hp=6e21669d5aad8e04c153cb1b4ffe0db0b79a43b3;hpb=8f082d78fafd94db3f21b503794e0875d3331e53;p=u-boot

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index 6e21669d5a..5062af5559 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -27,7 +27,6 @@
 #include <asm/arch/regs-usb.h>
 #include <asm/arch/regs-usbphy.h>
 
-#include "ehci-core.h"
 #include "ehci.h"
 
 #if	(CONFIG_EHCI_MXS_PORT != 0) && (CONFIG_EHCI_MXS_PORT != 1)
@@ -70,7 +69,7 @@ int mxs_ehci_get_port(struct ehci_mxs *mxs_usb, int port)
 #define	HW_DIGCTL_CTRL_USB0_CLKGATE	(1 << 2)
 #define	HW_DIGCTL_CTRL_USB1_CLKGATE	(1 << 16)
 
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
 
 	int ret;
@@ -107,28 +106,35 @@ int ehci_hcd_init(void)
 		&ehci_mxs.phy_regs->hw_usbphy_ctrl_set);
 
 	usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100;
-	hccr = (struct ehci_hccr *)usb_base;
+	*hccr = (struct ehci_hccr *)usb_base;
 
-	cap_base = ehci_readl(&hccr->cr_capbase);
-	hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
+	cap_base = ehci_readl(&(*hccr)->cr_capbase);
+	*hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
 
 	return 0;
 }
 
-int ehci_hcd_stop(void)
+int ehci_hcd_stop(int index)
 {
 	int ret;
-	uint32_t tmp;
+	uint32_t usb_base, cap_base, tmp;
 	struct mxs_register_32 *digctl_ctrl =
 		(struct mxs_register_32 *)HW_DIGCTL_CTRL;
 	struct mxs_clkctrl_regs *clkctrl_regs =
 		(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+	struct ehci_hccr *hccr;
+	struct ehci_hcor *hcor;
 
 	ret = mxs_ehci_get_port(&ehci_mxs, CONFIG_EHCI_MXS_PORT);
 	if (ret)
 		return ret;
 
 	/* Stop the USB port */
+	usb_base = ((uint32_t)ehci_mxs.usb_regs) + 0x100;
+	hccr = (struct ehci_hccr *)usb_base;
+	cap_base = ehci_readl(&hccr->cr_capbase);
+	hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
+
 	tmp = ehci_readl(&hcor->or_usbcmd);
 	tmp &= ~CMD_RUN;
 	ehci_writel(tmp, &hcor->or_usbcmd);