X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-sunxi.c;h=068f24f48392810401a609edd7596ba1e7791a48;hb=1a9a5f7a39d655868d7e51327786ca6bccbbec68;hp=0edb6438cbd74348df57d529c987d370caffe80b;hpb=e13afeef6f5d3c9c4fc130b21ee7c885f96d55f2;p=u-boot

diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 0edb6438cb..068f24f483 100644
--- a/drivers/usb/host/ehci-sunxi.c
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -14,53 +14,102 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/usb_phy.h>
 #include <asm/io.h>
+#include <dm.h>
 #include "ehci.h"
 
-int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
-		struct ehci_hcor **hcor)
+#ifdef CONFIG_SUNXI_GEN_SUN4I
+#define BASE_DIST		0x8000
+#define AHB_CLK_DIST		2
+#else
+#define BASE_DIST		0x1000
+#define AHB_CLK_DIST		1
+#endif
+
+struct ehci_sunxi_priv {
+	struct ehci_ctrl ehci;
+	int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */
+	int phy_index;     /* Index of the usb-phy attached to this hcd */
+};
+
+static int ehci_usb_probe(struct udevice *dev)
 {
 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-	int ahb_gate_offset;
+	struct usb_platdata *plat = dev_get_platdata(dev);
+	struct ehci_sunxi_priv *priv = dev_get_priv(dev);
+	struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev);
+	struct ehci_hcor *hcor;
+	int extra_ahb_gate_mask = 0;
 
-	ahb_gate_offset = index ? AHB_GATE_OFFSET_USB_EHCI1 :
-				  AHB_GATE_OFFSET_USB_EHCI0;
-	setbits_le32(&ccm->ahb_gate0, 1 << ahb_gate_offset);
-#ifdef CONFIG_SUNXI_GEN_SUN6I
-	setbits_le32(&ccm->ahb_reset0_cfg, 1 << ahb_gate_offset);
+	/*
+	 * This should go away once we've moved to the driver model for
+	 * clocks resp. phys.
+	 */
+	priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
+#if defined(CONFIG_MACH_SUNXI_H3_H5) || defined(CONFIG_MACH_SUN50I)
+	extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
 #endif
+	priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;
+	priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+	extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
+	priv->phy_index++; /* Non otg phys start at 1 */
 
-	sunxi_usb_phy_init(index + 1);
-	sunxi_usb_phy_power_on(index + 1);
-
-	if (index == 0)
-		*hccr = (void *)SUNXI_USB1_BASE;
-	else
-		*hccr = (void *)SUNXI_USB2_BASE;
+	setbits_le32(&ccm->ahb_gate0,
+		     priv->ahb_gate_mask | extra_ahb_gate_mask);
+#ifdef CONFIG_SUNXI_GEN_SUN6I
+	setbits_le32(&ccm->ahb_reset0_cfg,
+		     priv->ahb_gate_mask | extra_ahb_gate_mask);
+#endif
 
-	*hcor = (struct ehci_hcor *)((uint32_t) *hccr
-				+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+	sunxi_usb_phy_init(priv->phy_index);
+	sunxi_usb_phy_power_on(priv->phy_index);
 
-	debug("sunxi-ehci: init hccr %x and hcor %x hc_length %d\n",
-	      (uint32_t)*hccr, (uint32_t)*hcor,
-	      (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
+	hcor = (struct ehci_hcor *)((uintptr_t)hccr +
+				    HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
 
-	return 0;
+	return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
 }
 
-int ehci_hcd_stop(int index)
+static int ehci_usb_remove(struct udevice *dev)
 {
 	struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-	int ahb_gate_offset;
+	struct ehci_sunxi_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = ehci_deregister(dev);
+	if (ret)
+		return ret;
 
-	sunxi_usb_phy_power_off(index + 1);
-	sunxi_usb_phy_exit(index + 1);
+	sunxi_usb_phy_exit(priv->phy_index);
 
-	ahb_gate_offset = index ? AHB_GATE_OFFSET_USB_EHCI1 :
-				  AHB_GATE_OFFSET_USB_EHCI0;
 #ifdef CONFIG_SUNXI_GEN_SUN6I
-	clrbits_le32(&ccm->ahb_reset0_cfg, 1 << ahb_gate_offset);
+	clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask);
 #endif
-	clrbits_le32(&ccm->ahb_gate0, 1 << ahb_gate_offset);
+	clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask);
 
 	return 0;
 }
+
+static const struct udevice_id ehci_usb_ids[] = {
+	{ .compatible = "allwinner,sun4i-a10-ehci", },
+	{ .compatible = "allwinner,sun5i-a13-ehci", },
+	{ .compatible = "allwinner,sun6i-a31-ehci", },
+	{ .compatible = "allwinner,sun7i-a20-ehci", },
+	{ .compatible = "allwinner,sun8i-a23-ehci", },
+	{ .compatible = "allwinner,sun8i-a83t-ehci", },
+	{ .compatible = "allwinner,sun8i-h3-ehci",  },
+	{ .compatible = "allwinner,sun9i-a80-ehci", },
+	{ .compatible = "allwinner,sun50i-a64-ehci", },
+	{ }
+};
+
+U_BOOT_DRIVER(ehci_sunxi) = {
+	.name	= "ehci_sunxi",
+	.id	= UCLASS_USB,
+	.of_match = ehci_usb_ids,
+	.probe = ehci_usb_probe,
+	.remove = ehci_usb_remove,
+	.ops	= &ehci_usb_ops,
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv),
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};