X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-sunxi.c;h=d5eb492169672b6cfd88261edf830c92f0d1f998;hb=e162c6b1a758c6bda26417c1075fef7a97fb6743;hp=193ac433c1d575ac44e7981968f07e81c3656976;hpb=115200ceb0faad679bcc7d7dba4b63ff065606c5;p=u-boot diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 193ac433c1..d5eb492169 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -1,7 +1,8 @@ /* - * Copyright (C) 2014 Roman Byshko + * Sunxi ehci glue * - * Roman Byshko + * Copyright (C) 2015 Hans de Goede + * Copyright (C) 2014 Roman Byshko * * Based on code from * Allwinner Technology Co., Ltd. @@ -9,218 +10,101 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#include #include -#include +#include #include -#include +#include #include "ehci.h" -#define SUNXI_USB1_IO_BASE 0x01c14000 -#define SUNXI_USB2_IO_BASE 0x01c1c000 - -#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#define SUNXI_USB_CSR 0x01c13404 -#define SUNXI_USB_PASSBY_EN 1 - -#define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) -#define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9) -#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8) -#define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0) - -static struct sunxi_ehci_hcd { - struct usb_hcd *hcd; - int usb_rst_mask; - int ahb_clk_mask; - int gpio_vbus; - void *csr; - int irq; - int id; -} sunxi_echi_hcd[] = { - { - .usb_rst_mask = CCM_USB_CTRL_PHY1_RST, - .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .csr = (void *)SUNXI_USB_CSR, - .irq = 39, - .id = 1, - }, -#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1) - { - .usb_rst_mask = CCM_USB_CTRL_PHY2_RST, - .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, - .csr = (void *)SUNXI_USB_CSR, - .irq = 40, - .id = 2, - } -#endif -}; - -static int enabled_hcd_count; - -static void *get_io_base(int hcd_id) -{ - if (hcd_id == 1) - return (void *)SUNXI_USB1_IO_BASE; - else if (hcd_id == 2) - return (void *)SUNXI_USB2_IO_BASE; - else - return NULL; -} - -static int get_vbus_gpio(int hcd_id) -{ - switch (hcd_id) { - case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); - case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN); - } - return -1; -} - -static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr, - int data, int len) -{ - int j = 0, usbc_bit = 0; - void *dest = sunxi_ehci->csr; - - usbc_bit = 1 << (sunxi_ehci->id * 2); - for (j = 0; j < len; j++) { - /* set the bit address to be written */ - clrbits_le32(dest, 0xff << 8); - setbits_le32(dest, (addr + j) << 8); - - clrbits_le32(dest, usbc_bit); - /* set data bit */ - if (data & 0x1) - setbits_le32(dest, 1 << 7); - else - clrbits_le32(dest, 1 << 7); - - setbits_le32(dest, usbc_bit); - - clrbits_le32(dest, usbc_bit); - - data >>= 1; - } -} - -static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci) -{ - /* The following comments are machine - * translated from Chinese, you have been warned! - */ - - /* adjust PHY's magnitude and rate */ - usb_phy_write(sunxi_ehci, 0x20, 0x14, 5); - - /* threshold adjustment disconnect */ -#ifdef CONFIG_MACH_SUN4I - usb_phy_write(sunxi_ehci, 0x2a, 3, 2); +#ifdef CONFIG_SUNXI_GEN_SUN4I +#define BASE_DIST 0x8000 +#define AHB_CLK_DIST 2 #else - usb_phy_write(sunxi_ehci, 0x2a, 2, 2); +#define BASE_DIST 0x1000 +#define AHB_CLK_DIST 1 #endif - return; -} - -static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable) -{ - unsigned long bits = 0; - void *addr = get_io_base(sunxi_ehci->id) + SUNXI_USB_PMU_IRQ_ENABLE; - - bits = SUNXI_EHCI_AHB_ICHR8_EN | - SUNXI_EHCI_AHB_INCR4_BURST_EN | - SUNXI_EHCI_AHB_INCRX_ALIGN_EN | - SUNXI_EHCI_ULPI_BYPASS_EN; - - if (enable) - setbits_le32(addr, bits); - else - clrbits_le32(addr, bits); - - return; -} +struct ehci_sunxi_priv { + struct ehci_ctrl ehci; + int ahb_gate_mask; /* Mask of ahb_gate0 clk gate bits for this hcd */ + int phy_index; /* Index of the usb-phy attached to this hcd */ +}; -static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci) +static int ehci_usb_probe(struct udevice *dev) { struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + struct usb_platdata *plat = dev_get_platdata(dev); + struct ehci_sunxi_priv *priv = dev_get_priv(dev); + struct ehci_hccr *hccr = (struct ehci_hccr *)dev_get_addr(dev); + struct ehci_hcor *hcor; + + /* + * This should go away once we've moved to the driver model for + * clocks resp. phys. + */ + priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0; +#ifdef CONFIG_MACH_SUN8I_H3 + priv->ahb_gate_mask |= 1 << AHB_GATE_OFFSET_USB_OHCI0; +#endif + priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST; + priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST; + priv->phy_index++; /* Non otg phys start at 1 */ - setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); - setbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); - - sunxi_usb_phy_init(sunxi_ehci); - - sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN); - - if (sunxi_ehci->gpio_vbus != -1) - gpio_direction_output(sunxi_ehci->gpio_vbus, 1); -} - -static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci) -{ - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; + setbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); +#ifdef CONFIG_SUNXI_GEN_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); +#endif - if (sunxi_ehci->gpio_vbus != -1) - gpio_direction_output(sunxi_ehci->gpio_vbus, 0); + sunxi_usb_phy_init(priv->phy_index); + sunxi_usb_phy_power_on(priv->phy_index); - sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN); + hcor = (struct ehci_hcor *)((uint32_t)hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); - clrbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); - clrbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); + return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type); } -int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, - struct ehci_hcor **hcor) +static int ehci_usb_remove(struct udevice *dev) { struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index]; - int err; - - sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id); - - /* enable common PHY only once */ - if (index == 0) - setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); + struct ehci_sunxi_priv *priv = dev_get_priv(dev); + int ret; - if (sunxi_ehci->gpio_vbus != -1) { - err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus"); - if (err) - return err; - } + ret = ehci_deregister(dev); + if (ret) + return ret; - sunxi_ehci_enable(sunxi_ehci); + sunxi_usb_phy_exit(priv->phy_index); - *hccr = get_io_base(sunxi_ehci->id); - - *hcor = (struct ehci_hcor *)((uint32_t) *hccr - + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - debug("sunxi-ehci: init hccr %x and hcor %x hc_length %d\n", - (uint32_t)*hccr, (uint32_t)*hcor, - (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase))); - - enabled_hcd_count++; +#ifdef CONFIG_SUNXI_GEN_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, priv->ahb_gate_mask); +#endif + clrbits_le32(&ccm->ahb_gate0, priv->ahb_gate_mask); return 0; } -int ehci_hcd_stop(int index) -{ - struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index]; - int err; - - sunxi_ehci_disable(sunxi_ehci); - - if (sunxi_ehci->gpio_vbus != -1) { - err = gpio_free(sunxi_ehci->gpio_vbus); - if (err) - return err; - } - - /* disable common PHY only once, for the last enabled hcd */ - if (enabled_hcd_count == 1) - clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); - - enabled_hcd_count--; +static const struct udevice_id ehci_usb_ids[] = { + { .compatible = "allwinner,sun4i-a10-ehci", }, + { .compatible = "allwinner,sun5i-a13-ehci", }, + { .compatible = "allwinner,sun6i-a31-ehci", }, + { .compatible = "allwinner,sun7i-a20-ehci", }, + { .compatible = "allwinner,sun8i-a23-ehci", }, + { .compatible = "allwinner,sun8i-a83t-ehci", }, + { .compatible = "allwinner,sun8i-h3-ehci", }, + { .compatible = "allwinner,sun9i-a80-ehci", }, + { } +}; - return 0; -} +U_BOOT_DRIVER(ehci_sunxi) = { + .name = "ehci_sunxi", + .id = UCLASS_USB, + .of_match = ehci_usb_ids, + .probe = ehci_usb_probe, + .remove = ehci_usb_remove, + .ops = &ehci_usb_ops, + .platdata_auto_alloc_size = sizeof(struct usb_platdata), + .priv_auto_alloc_size = sizeof(struct ehci_sunxi_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +};