X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fusb%2Fhost%2Fehci-tegra.c;h=beb3b027963472933a1962dd9ad7626380f97c06;hb=711391131c84398d1b8256ab5a8cfa2969ad57c7;hp=eb54df471d90202fc6a3851d645332d360b5b630;hpb=1221ce459d04a428f8880f58581f671b736c3c27;p=u-boot

diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index eb54df471d..beb3b02796 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -600,9 +600,18 @@ static int init_ulpi_usb_controller(struct fdt_usb *config,
 
 	/* reset ULPI phy */
 	if (dm_gpio_is_valid(&config->phy_reset_gpio)) {
-		dm_gpio_set_value(&config->phy_reset_gpio, 0);
-		mdelay(5);
+		/*
+		 * This GPIO is typically active-low, and marked as such in
+		 * device tree. dm_gpio_set_value() takes this into account
+		 * and inverts the value we pass here if required. In other
+		 * words, this first call logically asserts the reset signal,
+		 * which typically results in driving the physical GPIO low,
+		 * and the second call logically de-asserts the reset signal,
+		 * which typically results in driver the GPIO high.
+		 */
 		dm_gpio_set_value(&config->phy_reset_gpio, 1);
+		mdelay(5);
+		dm_gpio_set_value(&config->phy_reset_gpio, 0);
 	}
 
 	/* Reset the usb controller */
@@ -687,7 +696,7 @@ static void config_clock(const u32 timing[])
 static int fdt_decode_usb(struct udevice *dev, struct fdt_usb *config)
 {
 	const void *blob = gd->fdt_blob;
-	int node = dev->of_offset;
+	int node = dev_of_offset(dev);
 	const char *phy, *mode;
 
 	config->reg = (struct usb_ctlr *)dev_get_addr(dev);