X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fvideo%2Fda8xx-fb.c;h=bbd384df5e64ff8b738d7787915ba628d9f0972a;hb=a4206575c8e0108faed0383c08b743b50e5562f5;hp=3a5f325cd30b97337c77280d5dc8877d2c86fceb;hpb=4eef93da262048eb1118e726b3ec5b8ebd3c6c91;p=u-boot

diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 3a5f325cd3..bbd384df5e 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -19,7 +19,7 @@
 #include <linux/list.h>
 #include <linux/fb.h>
 
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 
@@ -379,7 +379,7 @@ static void lcd_cfg_ac_bias(int period, int transitions_per_int)
 {
 	u32 reg;
 
-	/* Set the AC Bias Period and Number of Transisitons per Interrupt */
+	/* Set the AC Bias Period and Number of Transitions per Interrupt */
 	reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000;
 	reg |= LCD_AC_BIAS_FREQUENCY(period) |
 		LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int);
@@ -487,7 +487,7 @@ static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height,
 	/* Pixels per line = (PPL + 1)*16 */
 	if (lcd_revision == LCD_VERSION_1) {
 		/*
-		 * 0x3F in bits 4..9 gives max horisontal resolution = 1024
+		 * 0x3F in bits 4..9 gives max horizontal resolution = 1024
 		 * pixels
 		 */
 		width &= 0x3f0;
@@ -695,7 +695,7 @@ static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg,
 	lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp);
 	lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp);
 
-	/* Configure for disply */
+	/* Configure for display */
 	ret = lcd_cfg_display(cfg);
 	if (ret < 0)
 		return ret;
@@ -761,7 +761,7 @@ static u32 lcdc_irq_handler_rev01(void)
 
 		lcdc_write(stat, &da8xx_fb_reg_base->stat);
 
-		/* Disable PL completion inerrupt */
+		/* Disable PL completion interrupt */
 		reg_ras  = lcdc_read(&da8xx_fb_reg_base->raster_ctrl);
 		reg_ras &= ~LCD_V1_PL_INT_ENA;
 		lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl);
@@ -810,7 +810,7 @@ static u32 lcdc_irq_handler_rev02(void)
 
 		lcdc_write(stat, &da8xx_fb_reg_base->masked_stat);
 
-		/* Disable PL completion inerrupt */
+		/* Disable PL completion interrupt */
 		reg_int  = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) |
 			(LCD_V2_PL_INT_ENA);
 		lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr);
@@ -1035,16 +1035,6 @@ err_release_fb:
 	return NULL;
 }
 
-void video_set_lut(unsigned int index,	/* color number */
-		    unsigned char r,	/* red */
-		    unsigned char g,	/* green */
-		    unsigned char b	/* blue */
-		    )
-{
-
-	return;
-}
-
 void da8xx_video_init(const struct da8xx_panel *panel,
 		      const struct lcd_ctrl_config *lcd_cfg, int bits_pixel)
 {