X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=drivers%2Fwatchdog%2Fimx_watchdog.c;h=0d775956bff45fd52687676f16fc706788c2f6ff;hb=4ca0c3c993436cca743ed521e7f3d784d7fe31c8;hp=50e602af127b33eef7ab7320a9a552630b8fdc7b;hpb=a17617d6553369ba72c080128ed8d0b0c33dfc89;p=u-boot diff --git a/drivers/watchdog/imx_watchdog.c b/drivers/watchdog/imx_watchdog.c index 50e602af12..0d775956bf 100644 --- a/drivers/watchdog/imx_watchdog.c +++ b/drivers/watchdog/imx_watchdog.c @@ -8,19 +8,7 @@ #include #include #include - -struct watchdog_regs { - u16 wcr; /* Control */ - u16 wsr; /* Service */ - u16 wrsr; /* Reset Status */ -}; - -#define WCR_WDZST 0x01 -#define WCR_WDBG 0x02 -#define WCR_WDE 0x04 /* WDOG enable */ -#define WCR_WDT 0x08 -#define WCR_WDW 0x80 -#define SET_WCR_WT(x) (x << 8) +#include #ifdef CONFIG_IMX_WATCHDOG void hw_watchdog_reset(void) @@ -45,8 +33,8 @@ void hw_watchdog_init(void) #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000 #endif timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1; - writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | - WCR_WDW | SET_WCR_WT(timeout), &wdog->wcr); + writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS | + SET_WCR_WT(timeout), &wdog->wcr); hw_watchdog_reset(); } #endif @@ -55,7 +43,8 @@ void reset_cpu(ulong addr) { struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - writew(WCR_WDE, &wdog->wcr); + clrsetbits_le16(&wdog->wcr, 0, WCR_WDE); + writew(0x5555, &wdog->wsr); writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */ while (1) {