X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=examples%2Ftest_burst.c;h=7109c098ef18495ad28bbadc257b14bfbb775bb1;hb=28962f5a2de81bc0eed1c0b08c6bfaa1cc134ea2;hp=d8c5ed4a9edfd05b63f50514ae99ab45038e3af8;hpb=a07351fdbad1a92746d75a195eaef25d146c7f87;p=u-boot

diff --git a/examples/test_burst.c b/examples/test_burst.c
index d8c5ed4a9e..7109c098ef 100644
--- a/examples/test_burst.c
+++ b/examples/test_burst.c
@@ -50,19 +50,19 @@
 /* Define GPIO ports to signal start of burst transfers and errors */
 #ifdef CONFIG_LWMON
 /* Use PD.8 to signal start of burst transfers */
-#define GPIO1_DAT	(((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat)
+#define GPIO1_DAT	(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
 #define GPIO1_BIT	0x0080
 /* Configure PD.8 as general purpose output */
 #define GPIO1_INIT \
-	((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pdpar &= ~GPIO1_BIT; \
-	((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddir |=  GPIO1_BIT;
+	((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO1_BIT; \
+	((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |=  GPIO1_BIT;
 /* Use PD.9 to signal error */
-#define GPIO2_DAT	(((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddat)
+#define GPIO2_DAT	(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
 #define GPIO2_BIT	0x0040
 /* Configure PD.9 as general purpose output */
 #define GPIO2_INIT \
-	((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pdpar &= ~GPIO2_BIT; \
-	((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pddir |=  GPIO2_BIT;
+	((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO2_BIT; \
+	((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |=  GPIO2_BIT;
 #endif /* CONFIG_LWMON */