X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Faltera.h;h=ead5d3d810b9a12a37076f1b341a1cf4af128408;hb=c960ef29cd1bffccb84366cc6ca9c290cb3c36a0;hp=e266a6449c52103d79d657923594a307f1bb068c;hpb=77fa164839048609e0379f4f2f276a5d6892a0eb;p=u-boot diff --git a/include/altera.h b/include/altera.h index e266a6449c..ead5d3d810 100644 --- a/include/altera.h +++ b/include/altera.h @@ -1,8 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - * - * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -10,6 +9,19 @@ #ifndef _ALTERA_H_ #define _ALTERA_H_ +/* + * For the StratixV FPGA programming via SPI, the following + * information is coded in the 32bit cookie: + * Bit 31 ... Bit 0 + * SPI-Bus | SPI-Dev | Config-Pin | Done-Pin + */ +#define FPGA_COOKIE(bus, dev, config, done) \ + (((bus) << 24) | ((dev) << 16) | ((config) << 8) | (done)) +#define COOKIE2SPI_BUS(c) (((c) >> 24) & 0xff) +#define COOKIE2SPI_DEV(c) (((c) >> 16) & 0xff) +#define COOKIE2CONFIG(c) (((c) >> 8) & 0xff) +#define COOKIE2DONE(c) ((c) & 0xff) + enum altera_iface { /* insert all new types after this */ min_altera_iface_type, @@ -40,6 +52,10 @@ enum altera_family { Altera_CYC2, /* StratixII Family */ Altera_StratixII, + /* StratixV Family */ + Altera_StratixV, + /* SoCFPGA Family */ + Altera_SoCFPGA, /* Add new models here */ @@ -87,8 +103,17 @@ typedef struct { Altera_done_fn done; Altera_clk_fn clk; Altera_data_fn data; + Altera_write_fn write; Altera_abort_fn abort; Altera_post_fn post; } altera_board_specific_func; +#ifdef CONFIG_FPGA_SOCFPGA +int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); +#endif + +#ifdef CONFIG_FPGA_STRATIX_V +int stratixv_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size); +#endif + #endif /* _ALTERA_H_ */