X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fasm-blackfin%2Fio.h;h=68064949834636a82e505f711bc92bd51305210a;hb=64ace0d1e5302ada84edb2ea473e5b89198c3353;hp=332d2c643745f6aa12b4a865c9710b5e2a55fa8f;hpb=b99c1e6d8eec327c4b4dd99bf4c0d1a1eba2ce0a;p=u-boot

diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h
index 332d2c6437..6806494983 100644
--- a/include/asm-blackfin/io.h
+++ b/include/asm-blackfin/io.h
@@ -27,7 +27,12 @@
 
 #ifdef __KERNEL__
 
-#include <linux/config.h>
+#include <asm/blackfin.h>
+
+static inline void sync(void)
+{
+	SSYNC();
+}
 
 /* function prototypes for CF support */
 extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words);
@@ -35,9 +40,33 @@ extern void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words);
 extern unsigned char cf_inb(volatile unsigned char *addr);
 extern void cf_outb(unsigned char val, volatile unsigned char *addr);
 
-static inline void sync(void)
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE	(0)
+#define MAP_WRCOMBINE	(0)
+#define MAP_WRBACK	(0)
+#define MAP_WRTHROUGH	(0)
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
-	__builtin_bfin_ssync();
+	return (void *)paddr;
+}
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+static inline void unmap_physmem(void *vaddr, unsigned long flags)
+{
+
+}
+
+static inline phys_addr_t virt_to_phys(void * vaddr)
+{
+	return (phys_addr_t)(vaddr);
 }
 
 /*
@@ -51,37 +80,72 @@ static inline void sync(void)
  * memory location directly.
  */
 
-#define readb(addr)		({ unsigned char __v = (*(volatile unsigned char *) (addr));asm("ssync;"); __v; })
-#define readw(addr)		({ unsigned short __v = (*(volatile unsigned short *) (addr)); asm("ssync;");__v; })
-#define readl(addr)		({ unsigned int __v = (*(volatile unsigned int *) (addr));asm("ssync;"); __v; })
+#ifndef __ASSEMBLY__
+
+static inline unsigned char readb(const volatile void *addr)
+{
+	unsigned int val;
+	int tmp;
+
+	__asm__ __volatile__ ("cli %1;\n\t"
+			"NOP; NOP; SSYNC;\n\t"
+			"%0 = b [%2] (z);\n\t"
+			"sti %1;\n\t"
+			: "=d"(val), "=d"(tmp): "a"(addr));
+
+	return (unsigned char) val;
+}
+
+static inline unsigned short readw(const volatile void *addr)
+{
+	unsigned int val;
+	int tmp;
+
+	__asm__ __volatile__ ("cli %1;\n\t"
+			"NOP; NOP; SSYNC;\n\t"
+			"%0 = w [%2] (z);\n\t"
+			"sti %1;\n\t"
+			: "=d"(val), "=d"(tmp): "a"(addr));
 
-#define writeb(b,addr)		{((*(volatile unsigned char *) (addr)) = (b)); asm("ssync;");}
-#define writew(b,addr)		{((*(volatile unsigned short *) (addr)) = (b)); asm("ssync;");}
-#define writel(b,addr)		{((*(volatile unsigned int *) (addr)) = (b)); asm("ssync;");}
+	return (unsigned short) val;
+}
+
+static inline unsigned int readl(const volatile void *addr)
+{
+	unsigned int val;
+	int tmp;
+
+	__asm__ __volatile__ ("cli %1;\n\t"
+			"NOP; NOP; SSYNC;\n\t"
+			"%0 = [%2];\n\t"
+			"sti %1;\n\t"
+			: "=d"(val), "=d"(tmp): "a"(addr));
+	return val;
+}
 
-#define memset_io(a,b,c)	memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))
+#define __raw_readb readb
+#define __raw_readw readw
+#define __raw_readl readl
 
-#define inb_p(addr)		readb((addr) + BF533_PCIIO_BASE)
-#define inb(addr)		cf_inb((volatile unsigned char*)(addr))
+#endif /*  __ASSEMBLY__ */
 
-#define outb(x,addr)		cf_outb((unsigned char)(x), (volatile unsigned char*)(addr))
-#define outb_p(x,addr)		outb(x, (addr) + BF533_PCIIO_BASE)
+#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b))
+#define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b))
+#define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b))
+#define __raw_writeb writeb
+#define __raw_writew writew
+#define __raw_writel writel
 
-#define inw(addr)		readw((addr) + BF533_PCIIO_BASE)
-#define inl(addr)		readl((addr) + BF533_PCIIO_BASE)
+#define memset_io(a, b, c)	memset((void *)(a), (b), (c))
+#define memcpy_fromio(a, b, c)	memcpy((a), (void *)(b), (c))
+#define memcpy_toio(a, b, c)	memcpy((void *)(a), (b), (c))
 
-#define outw(x,addr)		writew(x, (addr) + BF533_PCIIO_BASE)
-#define outl(x,addr)		writel(x, (addr) + BF533_PCIIO_BASE)
+#define inb(addr)		cf_inb((volatile unsigned char *)(addr))
+#define outb(x, addr)		cf_outb((unsigned char)(x), (volatile unsigned char *)(addr))
 
-#define insb(port, addr, count)	memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), count)
-#define insw(port, addr, count)	cf_insw((unsigned short*)addr, (unsigned short*)(port), (count))
-#define insl(port, addr, count)	memcpy((void*)addr, (void*)(BF533_PCIIO_BASE + port), (4*count))
+#define insw(port, addr, count)	cf_insw((unsigned short *)addr, (unsigned short *)(port), (count))
 
-#define outsb(port,addr,count)	memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, count)
-#define outsw(port,addr,count)	cf_outsw((unsigned short*)(port), (unsigned short*)addr, (count))
-#define outsl(port,addr,count)	memcpy((void*)(BF533_PCIIO_BASE + port), (void*)addr, (4*count))
+#define outsw(port, addr, count)	cf_outsw((unsigned short *)(port), (unsigned short *)addr, (count))
 
 #define IO_SPACE_LIMIT		0xffff
 
@@ -117,9 +181,9 @@ extern inline void *ioremap_fullcache(unsigned long physaddr,
 extern void iounmap(void *addr);
 
 extern void blkfin_inv_cache_all(void);
-#define dma_cache_inv(_start,_size)		do { blkfin_inv_cache_all();} while (0)
-#define dma_cache_wback(_start,_size)		do { } while (0)
-#define dma_cache_wback_inv(_start,_size)	do { blkfin_inv_cache_all();} while (0)
+#define dma_cache_inv(_start, _size)		do { blkfin_inv_cache_all(); } while (0)
+#define dma_cache_wback(_start, _size)		do { } while (0)
+#define dma_cache_wback_inv(_start, _size)	do { blkfin_inv_cache_all(); } while (0)
 
 #endif
 #endif