X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fasm-sh%2Fcache.h;h=25b409b6b04eebc566e182a5c070c808e72c827c;hb=b99ba1679e8cd51b023e67098c89e606e47137d2;hp=67474c7b4404c91c81117ab52c93847d5e7f8cda;hpb=34e6cb8d1d9dc8194b2d8cad1cc39273ac58f8d8;p=u-boot

diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h
index 67474c7b44..25b409b6b0 100644
--- a/include/asm-sh/cache.h
+++ b/include/asm-sh/cache.h
@@ -7,28 +7,26 @@
 struct __large_struct { unsigned long buf[100]; };
 #define __m(x) (*(struct __large_struct *)(x))
 
-void dcache_wback_range(u32 start, u32 end)
+void dcache_wback_range (u32 start, u32 end)
 {
-    u32 v;
+	u32 v;
 
-    start &= ~(L1_CACHE_BYTES-1);
-    for (v = start; v < end; v+=L1_CACHE_BYTES) {
-        asm volatile("ocbwb     %0"
-                     : /* no output */
-                     : "m" (__m(v)));
-    }
+	start &= ~(L1_CACHE_BYTES - 1);
+	for (v = start; v < end; v += L1_CACHE_BYTES) {
+		asm volatile ("ocbwb     %0":	/* no output */
+			      :"m" (__m (v)));
+	}
 }
 
-void dcache_invalid_range(u32 start, u32 end)
+void dcache_invalid_range (u32 start, u32 end)
 {
-    u32 v;
+	u32 v;
 
-    start &= ~(L1_CACHE_BYTES-1);
-    for (v = start; v < end; v+=L1_CACHE_BYTES) {
-        asm volatile("ocbi     %0"
-                     : /* no output */
-                     : "m" (__m(v)));
-    }
+	start &= ~(L1_CACHE_BYTES - 1);
+	for (v = start; v < end; v += L1_CACHE_BYTES) {
+		asm volatile ("ocbi     %0":	/* no output */
+			      :"m" (__m (v)));
+	}
 }
 #endif /* CONFIG_SH4 || CONFIG_SH4A */