X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FAPC405.h;h=cb3f80bfa09d92a30985277a3639e7b82ba39119;hb=550650ddd0fde00f245bc3da72d7272844198394;hp=a7724adb42c41bc3515d03c8532baecb23ee1cff;hpb=2df0e6fc6b71448e1752e4ce1d5577d8977f3e5e;p=u-boot

diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index a7724adb42..cb3f80bfa0 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -176,6 +176,12 @@
 #define CONFIG_SYS_MEMTEST_START	0x0400000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x0C00000 /* 4 ... 12 MB in DRAM */
 
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
+
 #define CONFIG_SYS_EXT_SERIAL_CLOCK    14745600 /* use external serial clock   */
 
 /* The following table includes the supported baudrates */
@@ -264,16 +270,10 @@
 /*
  * FLASH organization
  */
-#ifndef __ASSEMBLY__
-extern int flash_banks;
-#endif
-
 #define CONFIG_SYS_FLASH_BASE		0xFE000000
 #define CONFIG_SYS_FLASH_CFI		1	/* Flash is CFI conformant */
 #define CONFIG_FLASH_CFI_DRIVER	1	/* Use the common driver */
 #define CONFIG_SYS_MAX_FLASH_SECT	256	/* max num of sects on one chip */
-#define CONFIG_SYS_MAX_FLASH_BANKS	flash_banks /* max num of flash banks */
-					    /* updated in board_early_init_r */
 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 2
 #define CONFIG_SYS_FLASH_QUIET_TEST	1
 #define CONFIG_SYS_FLASH_INCREMENT	0x01000000