X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FBC3450.h;h=802e9cce1fb61e3ac50c2844bb4417e02d905bfa;hb=9f6044256ecb3aa2d62f1f26ca564d0e55e19458;hp=563da6883e7c680af8b708b77bbe797bfbb65bc4;hpb=553f09823cced77296825f615f00321d932bf914;p=u-boot

diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 563da6883e..802e9cce1f 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -13,23 +13,7 @@
  * History:
  *	1.1 - add define CONFIG_ZERO_BOOTDELAY_CHECK
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -38,8 +22,7 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_MPC5xxx		1	/* This is an MPC5xxx CPU	    */
-#define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU)   */
+#define CONFIG_MPC5200		1	/* This is a MPC5200 CPU	    */
 #define CONFIG_TQM5200		1	/* ... on a TQM5200 module	    */
 
 #define CONFIG_BC3450		1	/* ... on a BC3450 mainboard	    */
@@ -106,7 +89,6 @@
 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE	0x01000000
 
-#define CONFIG_NET_MULTI	1
 /*#define CONFIG_EEPRO100	XXX - FIXME: conflicts when CONFIG_MII is enabled */
 #define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/
 #define CONFIG_NS8382X		1
@@ -389,8 +371,7 @@
 # define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE
 #endif /*CONFIG_POST*/
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* Bytes reserved for initial data  */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
@@ -445,7 +426,6 @@
  * Miscellaneous configurable options
  */
 #define CONFIG_SYS_LONGHELP				/* undef to save memory	    */
-#define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt   */
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_SYS_CBSIZE		1024		/* Console I/O Buffer Size  */
 #else
@@ -463,8 +443,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x100000	/* default load address	    */
 
-#define CONFIG_SYS_HZ			1000		/* dec freq: 1ms ticks	    */
-
 #define CONFIG_SYS_CACHELINE_SIZE	32	/* For MPC5xxx CPUs		    */
 #if defined(CONFIG_CMD_KGDB)
 #  define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value    */