X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FCPCI4052.h;h=2677cfb271ea516e2727470b489b3be932f50f0f;hb=16bdc39f7555e23c76f1dcd3da96e7bbce839241;hp=734ab95e43e522c757bc56272bb1c6ab48fcfcad;hpb=50bd0057ba8fceeb48533f8b1a652ccd0e170838;p=u-boot

diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index 734ab95e43..2677cfb271 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -54,6 +54,7 @@
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
 #define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
 
+#define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		0	/* PHY address			*/
 #define CONFIG_LXT971_NO_SLEEP  1       /* disable sleep mode in LXT971 */
@@ -133,7 +134,6 @@
 #define CONFIG_SYS_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
 
 #undef	CONFIG_SYS_EXT_SERIAL_CLOCK	       /* no external serial clock used */
-#define CONFIG_SYS_IGNORE_405_UART_ERRATA_59	/* ignore ppc405gp errata #59	*/
 #define CONFIG_SYS_BASE_BAUD	    691200
 
 /* The following table includes the supported baudrates */
@@ -215,6 +215,8 @@
 #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)	/* Reserve 256 kB for Monitor	*/
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024)	/* Reserve 128 kB for malloc()	*/
 
+#define CONFIG_PRAM		0	/* use pram variable to overwrite */
+
 /*
  * For booting Linux, the board info and command line data
  * have to be in the first 8 MB of memory, since this is