X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FDU440.h;h=bbe271303a839f6bc15d6bdaa8c6795f8318cacd;hb=039cbaefcf57338cc9b6a3c656db64e7907838db;hp=e6abbdc5f3aeaed8e22113cdc782f6ab7d55375f;hpb=8ddfe804c49f7b738eebfdc6a5d0e406581faf49;p=u-boot

diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index e6abbdc5f3..bbe271303a 100644
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -37,6 +37,10 @@
 #define CONFIG_4xx		1		/* ... PPC4xx family	*/
 #define CONFIG_SYS_CLK_FREQ	33333400	/* external freq to pll	*/
 
+#ifndef CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_TEXT_BASE	0xFFFA0000
+#endif
+
 #define CONFIG_BOARD_EARLY_INIT_F 1		/* Call board_early_init_f */
 #define CONFIG_MISC_INIT_R	1		/* Call misc_init_r	*/
 #define CONFIG_LAST_STAGE_INIT  1               /* last_stage_init      */
@@ -51,7 +55,7 @@
 #define CONFIG_SYS_BOOT_BASE_ADDR	0xf0000000
 #define CONFIG_SYS_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
 #define CONFIG_SYS_FLASH_BASE		0xfc000000	/* start of FLASH	*/
-#define CONFIG_SYS_MONITOR_BASE	TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND0_ADDR		0xd0000000      /* NAND Flash		*/
 #define CONFIG_SYS_NAND1_ADDR		0xd0100000      /* NAND Flash		*/
 #define CONFIG_SYS_OCM_BASE		0xe0010000      /* ocm			*/
@@ -60,11 +64,9 @@
 #define CONFIG_SYS_PCI_MEMBASE1	CONFIG_SYS_PCI_MEMBASE  + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE2	CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
 #define CONFIG_SYS_PCI_MEMBASE3	CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
-#define CONFIG_SYS_PCI_IOBASE          0xe8000000
-
-
-/* Don't change either of these */
-#define CONFIG_SYS_PERIPHERAL_BASE	0xef600000	/* internal peripherals	*/
+#define CONFIG_SYS_PCI_IOBASE		0xe8000000
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID	PCI_VENDOR_ID_ESDGMBH
+#define CONFIG_SYS_PCI_SUBSYS_ID	0x0444		/* device ID for DU440 */
 
 #define CONFIG_SYS_USB2D0_BASE		0xe0000100
 #define CONFIG_SYS_USB_DEVICE		0xe0000000
@@ -77,18 +79,20 @@
 #define CONFIG_SYS_INIT_RAM_OCM	1		/* OCM as init ram	*/
 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_BASE	/* OCM			*/
 
-#define CONFIG_SYS_INIT_RAM_END	(4 << 10)
-#define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE	(4 << 10)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 /*
  * Serial Port
  */
+#define CONFIG_CONS_INDEX	1	/* Use UART0			*/
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	1
+#define CONFIG_SYS_NS16550_CLK		get_serial_clock()
 #undef CONFIG_SYS_EXT_SERIAL_CLOCK
 #define CONFIG_BAUDRATE		115200
-#define CONFIG_SERIAL_MULTI     1
-#undef CONFIG_UART1_CONSOLE
 
 #define CONFIG_SYS_BAUDRATE_TABLE						\
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
@@ -168,9 +172,9 @@
  */
 #define CONFIG_HARD_I2C		1	/* I2C with hardware support    */
 #undef	CONFIG_SOFT_I2C			/* I2C bit-banged	        */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		100000	/* I2C speed and slave address  */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
-#define CONFIG_I2C_CMD_TREE     1
 #define CONFIG_I2C_MULTI_BUS    1
 
 #define CONFIG_SYS_SPD_BUS_NUM         0
@@ -264,7 +268,6 @@ int du440_phy_addr(int devnum);
 #define CONFIG_HAS_ETH0
 #define CONFIG_SYS_RX_ETH_BUFFER	128
 
-#define CONFIG_NET_MULTI	1
 #define CONFIG_HAS_ETH1		1	/* add support for "eth1addr"	*/
 #define CONFIG_PHY1_ADDR	du440_phy_addr(1)
 
@@ -415,14 +418,6 @@ int du440_phy_addr(int devnum);
 #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
 				 CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH */
-#define BOOTFLAG_WARM	0x02		/* Software reboot */
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */