X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FIceCube.h;h=bc5d761f8abc4468ef1acafdad851812009ca0a7;hb=374a235d42fa63cc84dbf384944a69b2d05bdc81;hp=b62945e838cbb38e0ebd8a8e6df2b4a146e86604;hpb=14d0a02a168b36e87665b8d7f42fa3e88263d26d;p=u-boot

diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index b62945e838..bc5d761f8a 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -33,10 +33,18 @@
 #define CONFIG_MPC5200		1	/* (more precisely a MPC5200 CPU) */
 #define CONFIG_ICECUBE		1	/* ... on IceCube board */
 
-#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
+/*
+ * Valid values for CONFIG_SYS_TEXT_BASE are:
+ * 0xFFF00000	boot high (standard configuration)
+ * 0xFF000000	boot low for 16 MiB boards
+ * 0xFF800000	boot low for  8 MiB boards
+ * 0x00100000	boot from RAM (for testing only)
+ */
+#ifndef CONFIG_SYS_TEXT_BASE
+#define	CONFIG_SYS_TEXT_BASE	0xFFF00000
+#endif
 
-#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH  */
-#define BOOTFLAG_WARM		0x02	/* Software reboot	     */
+#define CONFIG_SYS_MPC5XXX_CLKIN	33000000 /* ... running at 33.000000MHz */
 
 #define CONFIG_HIGH_BATS	1	/* High BATs supported */
 
@@ -267,11 +275,10 @@
 
 /* Use SRAM until RAM will be available */
 #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM
-#define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE	/* End of used area in DPRAM */
+#define CONFIG_SYS_INIT_RAM_SIZE	MPC5XXX_SRAM_SIZE	/* Size of used area in DPRAM */
 
 
-#define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_BASE    CONFIG_SYS_TEXT_BASE