X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FJSE.h;h=ef652b2dc846bc5fa0da26989260d1d88e40abeb;hb=cfeba45f505290ec719076dd174727d10045aa2b;hp=b0b117575ccec9cf03ab2c0090c37ba34e35d2c9;hpb=2e6e1772c0e34871769be4aef79748fe3e47d953;p=u-boot

diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index b0b117575c..ef652b2dc8 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -37,7 +37,7 @@
   /* JSE has a PPC405GPr */
 #define CONFIG_405GP 1
   /* ... which is a 4xxx series */
-#define CONFIG_4xx   1
+#define CONFIG_4x   1
   /* ... with a 33MHz OSC. connected to the SysCLK input */
 #define CONFIG_SYS_CLK_FREQ	33333333
   /* ... with on-chip memory here (4KBytes) */
@@ -46,6 +46,8 @@
   /* Do not set up locked dcache as init ram. */
 #undef CONFIG_SYS_INIT_DCACHE_CS
 
+#define	CONFIG_SYS_TEXT_BASE	0xFFF80000
+
   /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */
 #define CONFIG_SYSTEMACE 1
 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
@@ -57,10 +59,9 @@
   /* ... place INIT RAM in the OCM address */
 # define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_OCM_DATA_ADDR
   /* ... give it the whole init ram */
-# define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE
+# define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_OCM_DATA_SIZE
   /* ... Shave a bit off the end for global data */
-# define CONFIG_SYS_GBL_DATA_SIZE	128
-# define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+# define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
   /* ... and place the stack pointer at the top of what's left. */
 # define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
@@ -133,7 +134,6 @@
 #define CONFIG_PPC4xx_EMAC
 #define CONFIG_MII		1	/* MII PHY management		*/
 #define CONFIG_PHY_ADDR		1	/* PHY address			*/
-#define CONFIG_NET_MULTI
 
 
 /*
@@ -293,15 +293,6 @@
 /* Configuration Port location */
 #define CONFIG_PORT_ADDR	0xF0000500
 
-
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
-#define BOOTFLAG_WARM	0x02		/* Software reboot			*/
-
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE	230400	/* speed to run kgdb serial port */
 #define CONFIG_KGDB_SER_INDEX	2	/* which serial port to use */