X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FM5282EVB.h;h=8131ea0ee1f0b4b83b3a58742d8ca3253dbe2cc9;hb=89cb2b5f8be4f6d04bd87220aa8f72eb0850edc4;hp=6e0aa14d3a0945bc24757fc7f589f81bc0c75099;hpb=ffa37fc98d71ef930bccd4e9eed37f6ce6b4d6af;p=u-boot diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 6e0aa14d3a..8131ea0ee1 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -3,23 +3,7 @@ * * (C) Copyright 2003 Josef Baumgartner * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA + * SPDX-License-Identifier: GPL-2.0+ */ /* @@ -33,15 +17,11 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCF52x2 /* define processor family */ -#define CONFIG_M5282 /* define processor type */ - #define CONFIG_MCFTMR #define CONFIG_MCFUART #define CONFIG_SYS_UART_PORT (0) #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ @@ -52,6 +32,10 @@ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_IS_IN_FLASH 1 +#define LDS_BOARD_TEXT \ + . = DEFINED(env_offset) ? env_offset : .; \ + common/env_embedded.o (.text*); + /* * BOOTP options */ @@ -63,18 +47,9 @@ /* * Command line configuration. */ -#include -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_MII - -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADB #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY @@ -97,12 +72,10 @@ #define CONFIG_BOOTDELAY 5 #ifdef CONFIG_MCFFEC -# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 # define CONFIG_SERVERIP 192.162.1.1 # define CONFIG_GATEWAYIP 192.162.1.1 -# define CONFIG_OVERWRITE_ETHADDR_ONCE #endif /* CONFIG_MCFFEC */ #define CONFIG_HOSTNAME M5282EVB @@ -118,7 +91,6 @@ "save\0" \ "" -#define CONFIG_SYS_PROMPT "-> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #if defined(CONFIG_CMD_KGDB) @@ -135,7 +107,6 @@ #define CONFIG_SYS_MEMTEST_START 0x400 #define CONFIG_SYS_MEMTEST_END 0x380000 -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CLK 64000000 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ @@ -154,9 +125,8 @@ * Definitions for initial stack pointer and data area (in DPRAM) */ #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 -#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /*----------------------------------------------------------------------- @@ -172,10 +142,10 @@ /* If M5282 port is fully implemented the monitor base will be behind * the vector table. */ -#if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) +#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #else -#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ #endif #define CONFIG_SYS_MONITOR_LEN 0x20000 @@ -211,9 +181,9 @@ #define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 8) + CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_END - 4) + CONFIG_SYS_INIT_RAM_SIZE - 4) #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \