X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=include%2Fconfigs%2FM5475EVB.h;h=af6723c63753717faad66bdaf4d1ad7e305abd39;hb=48d0192fe869948fef14b460b5f0c85bca933693;hp=f0d42beb9979d38f9b5a89843286abc0601a295b;hpb=faf8f9bc95e526446c3b0554ebdc22af1291e72a;p=u-boot

diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index f0d42beb99..af6723c637 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -69,8 +69,10 @@
 #ifdef CONFIG_FSLDMAFEC
 #	define CONFIG_NET_MULTI		1
 #	define CONFIG_MII		1
+#	define CONFIG_MII_INIT		1
 #	define CONFIG_HAS_ETH1
 
+#	define CFG_DMA_USE_INTSRAM	1
 #	define CFG_DISCOVER_PHY
 #	define CFG_RX_ETH_BUFFER	32
 #	define CFG_TX_ETH_BUFFER	48
@@ -81,7 +83,7 @@
 #	define CFG_FEC1_PINMUX		0
 #	define CFG_FEC1_MIIBASE		CFG_FEC0_IOBASE
 
-#	define MCFFEC_TOUT_LOOP 	50000
+#	define MCFFEC_TOUT_LOOP		50000
 /* If CFG_DISCOVER_PHY is not defined - hardcoded */
 #	ifndef CFG_DISCOVER_PHY
 #		define FECDUPLEX	FULL
@@ -132,7 +134,7 @@
 #ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI		1
 #define CONFIG_PCI_PNP		1
-#define CONFIG_SKIPPCI_HOSTBRIDGE
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE	1
 
 #define CFG_PCI_CACHE_LINE_SIZE	8
 
@@ -224,7 +226,7 @@
  */
 #define CFG_SDRAM_BASE		0x00000000
 #define CFG_SDRAM_CFG1		0x73711630
-#define CFG_SDRAM_CFG2		0x46370000
+#define CFG_SDRAM_CFG2		0x46770000
 #define CFG_SDRAM_CTRL		0xE10B0000
 #define CFG_SDRAM_EMOD		0x40010000
 #define CFG_SDRAM_MODE		0x018D0000
@@ -257,7 +259,7 @@
 #define CFG_FLASH_CFI
 #ifdef CFG_FLASH_CFI
 #	define CFG_FLASH_BASE		(CFG_CS0_BASE)
-#	define CFG_FLASH_CFI_DRIVER	1
+#	define CONFIG_FLASH_CFI_DRIVER	1
 #	define CFG_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #	define CFG_MAX_FLASH_SECT	137	/* max number of sectors on one chip */
 #	define CFG_FLASH_PROTECTION	/* "Real" (hardware) sectors protection */
@@ -301,9 +303,9 @@
 #define CFG_CS0_CTRL		0x00101980
 
 #ifdef CFG_NOR1SZ
-#define CFG_CS1_BASE		0xF8000000
+#define CFG_CS1_BASE		0xE0000000
 #define CFG_CS1_MASK		(((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001)
-#define CFG_CS1_CTRL		0x00000D80
+#define CFG_CS1_CTRL		0x00101D80
 #endif
 
 #endif				/* _M5475EVB_H */